What is the issue with my boost converter design and how can I fix it?

AI Thread Summary
The discussion revolves around issues with a boost converter design attempting to convert 12V to 200V. Users report unexpected voltage outputs at certain duty cycles, with significant jumps in voltage at specific points, indicating potential design flaws. Key concerns include the need for a feedback mechanism to regulate output voltage and prevent inductor saturation, as well as the importance of understanding Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). Suggestions include using a controller for feedback and adjusting circuit components, such as the inductor and diode, to improve performance. The conversation emphasizes the necessity of studying boost converter theory and proper circuit design to achieve desired results.
core7916
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Hello,
I am designing a simple boost circuit, in which I have convert output of 200v.
i am testing the idifferent input voltages , 12, 15 and 24v supply.

But in each time there is no change in voltage in duty cycle- 20% -40%.
like example. i am giving input as 12v.
outputs are.
duty cycle - output oltage
10% -30v
20% - 72v
30% - 80v
40% - 88v
45% -160vmy concern is why there is no change in voltages in 20% 30% duty cycle.
* i am giving pulses to mosfet which i am generating from ir2110 gate drivers.
* above is the example whiuch i tried with 12v . And the same kind of output (but higher voltages) i am getting when i tried with 15 and 24v.
* i am observing that after no change in duty cycle the voltage is increasing suddenly to a higher voltages.
(in above 88v to 160v).

1) is this the way boost converter works?
2) if not what is the reason for this irregular output ?
3) how to avoid it.?

i am designing the circuit with reference of online designs.
 
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core7916 said:
1) is this the way boost converter works?
2) if not what is the reason for this irregular output ?
It depends on the topology.
Does the boost converter operate at a fixed frequency?

Please provide a link to the design you are building.
Please attach the schematic to your next post.
Have you simulated the converter?
 
switching frequency is 300khz..
i am attaching boost circuit schematic.
yes sir simulated in multisim.
boost circuit design.PNG
 
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Are you measuring a real system, or is this all simulation?

While the switch MOSFET is closed, current increases in the inductor.
When the switch opens, the inductor delivers that current to the output.
When converting from 12 V to 200 V you can expect a duty cycle with 95% switch on, with 5% boost during off. If that is not the case, I would look at the inductance value, series resistance and saturation.
1. Plotting duty cycle against output voltage assumes a fixed load current. But the current is voltage dependent. Open loop operation is not used for flyback boost converters, so why do you model it ?
2. For big voltage ratios, a transformer would be used in place of the inductor. That can reduce peak currents on the supply and load.
3. If the output load goes open circuit, the output capacitors will be damaged by overvoltage.
4. You need a controller with some feedback of output voltage to the regulator. That controller should limit the inductor current when there is a short circuit.
What type of controller are you contemplating ?
 
Baluncore said:
Are you measuring a real system, or is this all simulation?

While the switch MOSFET is closed, current increases in the inductor.
When the switch opens, the inductor delivers that current to the output.
When converting from 12 V to 200 V you can expect a duty cycle with 95% switch on, with 5% boost during off. If that is not the case, I would look at the inductance value, series resistance and saturation.
1. Plotting duty cycle against output voltage assumes a fixed load current. But the current is voltage dependent. Open loop operation is not used for flyback boost converters, so why do you model it ?
2. For big voltage ratios, a transformer would be used in place of the inductor. That can reduce peak currents on the supply and load.
3. If the output load goes open circuit, the output capacitors will be damaged by overvoltage.
4. You need a controller with some feedback of output voltage to the regulator. That controller should limit the inductor current when there is a short circuit.
What type of controller are you contemplating ?

Sir i am testing real time system.
As you said for converting 12 v to 200v i need duty cycle should be high.
So insted of giving 12v i am giving 24v. Then also at 20-40% there is no change in voltage. After that sudden increase is happening.

The capacitor what i am using has rating of 400v. I used all components which are high rated for testing.

Sir i didn't inderstand the 4th point you are explained. Please explain more about this
 
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Follow the sequence of one cycle. Inductor current starts out at zero.
Close the MOSFET switch.
V = L·di/dt ; is the key to understanding inductor current.
di/dt = V/L ; which shows that the rate current rises, is proportional to the input voltage.

At some duty-cycle determined point, the switch turns off.
The inductor current is then I, and the stored magnetic energy, E = ½·L·I² .
The inductor current then flows through the diode to the output reservoir capacitor. It takes less time for the current to fall to zero because the output voltage is much higher than the input voltage. That is di/dt = V/L , again.

But how do you know the current has time to fall to zero, before you turn the switch on again with the fixed frequency and duty-cycle? And, what if it didn't fall to zero, it would start out higher, and get higher again each cycle, until the inductor saturated.

Operation as an open loop is not sensible, you need to close the voltage feedback loop. Something must prevent over-voltage destroying the output capacitors. Something must keep the inductor from saturating. That is a job for a voltage regulator, controller.
 
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Your boost converter has essentially no load at the output. As @Baluncore explained above, there will be nowhere for the energy in the inductor to go. The result will be extremely high voltages at the output. This is how older auto ignition systems make a sparks. I calculated for your circuit 1.1KV at 50% duty cycle and 12 V input. Of course you won't get that, something will fail first. To make 200V from 12V, I calculated a duty cycle of about 9%.

You really need to study the theory of boost converters a bit before you try to design one. In particular, you should learn about "Continuous Conduction Mode" (CCM) and "Discontinuous Conduction Mode" (DCM). If that isn't something you know about yet, then you aren't ready to work with these circuits, IMO. I highly recommend the textbook "Fundamentals of Power Electronics" by Robert W. Erickson, but I'm sure there's lots of good stuff on the web too.
 
  • #10
Thank ypu all for your replies. I will go more about this and get back if any other issue is there.
 
  • #11
The reason for the clustering of output voltages for different duty-cycles is related to the mode of operation, influenced by the way current flows in the simulated inductor. If I place a diode, D1, in series with the inductor and supply, it performs without the clustering, and with different output voltages.
Percentage duty-cycle for traces are labelled in the same colour.

Boost_schematic.png

With D1
1_way .png

Without D1
2_way.png
 
  • #12
Baluncore said:
the way current flows in the simulated inductor
Is that from the reverse recovery of D2? The simplest models say no current can flow that way. It seems it should be a pretty benign (soft) turn off for D2 in DCM mode.

Or maybe something about increased switching losses with the drain capacitance. Maybe quasi-resonant style? That kind of makes my brain hurt to figure out.
 
  • #13
DaveE said:
Is that from the reverse recovery of D2? The simplest models say no current can flow that way. It seems it should be a pretty benign (soft) turn off for D2 in DCM mode.

Or maybe something about increased switching losses with the drain capacitance. Maybe quasi-resonant style? That kind of makes my brain hurt to figure out.
I do not yet know what mode it is, but I have managed to duplicate a clustered output simulation similar to the OP, with what I think is the simplest parameterised circuit in LTspice.

It does appear to be a bizarre π resonance involving the supply, inductor and the switch, but due to my other priorities, it will have to wait for the weekend before I will know if it is "too ideal" a model, or some real possibility. That is, unless someone else solves it first.
 
  • #14
Baluncore said:
It does appear to be a bizarre π resonance involving the supply, inductor and the switch
Yes, that's guess too, unless you have a REALLY slow (or schottky) diode for D2. But I don't think it's bizarre. It is normal in SMPS when conduction stops for nodes to show LC style (parasitic) oscillations. But I don't understand how that consumes more energy than the non-oscillatory case of the drain voltage being left high and then dissipated resistively during the FET turn on. As I said it makes my brain hurt... or, maybe I'm just lazy.
 
  • #15
Hello.
While testing real time system i am getting profile like below.
I have given output voltage vs duty cycle graph.
In the test.
I am suppling 12v as input.
I am bit confused about waveform. Is this the corrct wave which i should get.
 
  • #16
core7916 said:
While testing real time system i am getting profile like below.
I see nothing below.
 
  • #17
Baluncore said:
I see nothing below.
Sorry sir. I didnt attach file.
Below is the graph. I tested the circuit with different conditions. That is the reason for 2 curves.
20230314_065543.jpg
 
  • #18
core7916 said:
I tested the circuit with different conditions.
Very good. I would guess those two conditions were with a Banana-Cream pie and a Hand-Grenade.

Am I close?
 
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  • #19
Tom.G said:
Very good. I would guess those two conditions were with a Banana-Cream pie and a Hand-Grenade.

Am I close?
Sorry. That is with load and without load.
I am designing to actuate a piezo actuator.
Dont go with two curves. Take any one of the curve.
If you know why i am getting that profiel. Please tell us.
 
  • #20
Tom.G said:
Very good. I would guess those two conditions were with a Banana-Cream pie and a Hand-Grenade.
Am I close?
Congratulations, we have a winner, give that man a coconut.
core7916 said:
Sorry. That is with load and without load.
I am designing to actuate a piezo actuator.
core7916 said:
While testing real time system i am getting profile like below.
I have given output voltage vs duty cycle graph.
In the test.
I am suppling 12v as input.
I am bit confused about waveform. Is this the corrct wave which i should get.
By waveform, or wave, I assume you mean the shape of the line on the graph. I can understand that a real circuit may have that parametric relationship. But I am not happy that you are testing a useful circuit. Is the circuit built according to your diagram in post #3 ?
 
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  • #21
core7916 said:
If you know why i am getting that profiel. Please tell us.
What you are measuring (graphing) is the transfer curve of the boost circuit from the Gate of Q1 to the output voltage; specifically, duty cycle versus output voltage. The reason the two curves are shifted is that with a load connected, the duty cycle has to be higher to supply current to the load.

As @Baluncore said:
Baluncore said:
4. You need a controller with some feedback of output voltage to the regulator. That controller should limit the inductor current when there is a short circuit.
What type of controller are you contemplating ?
To say it another way, you need additional circuitry that senses output voltage and then controls the switching of Q1. The 'feedback' circuit will automatically shift those two load/no-load curves as needed to maintain the output voltage you design for.

This circuitry could either:
  1. Shut off the drive to Q1 when the output voltage gets too high,
  2. or it could decrease the duty cycle at high output voltage.

Note also the diode (D1) that @Baluncore added and the changed L1 value:
Baluncore said:
boost_schematic-png.png
With D1 he seemed to get pretty good linearity of duty cycle vs output voltage.

Hope this helps!

Cheers,
Tom
 
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  • #22
Sir i already tried with the circuit , baluncore suggested. Still getting the curves that i have given previously.
I have simulated the circuit in multisim and i got the graph . Which i have attached. If we compare both simulated and real time graph, there is no simularities.
I dont know how thease differes since i am testing same circuit real time. (Components are different in simulation and real time).

I am new to thease i dont have much knowledge about feedback circuitry

Reference: https://www.physicsforums.com/threads/analysis-of-boost-converter.1050594/
20230314_142145.jpg

Red line : 300khz switching frequency.
grey line : 100khz . ( simulated in multisim).
 
  • #23
core7916 said:
Below is the graph. I tested the circuit with different conditions. That is the reason for 2 curves.
Re: Post #17. How can you measure a stable output voltage, when you have no load, what stops the output voltage from continuing to rise ?

core7916 said:
I dont know how thease differes since i am testing same circuit real time. (Components are different in simulation and real time).

Re: Post #22. The two curves need to be simulated and measured at the same switching frequency, and the load must be specified.

I cannot simulate your circuit in LTspice because;
1. I do not have models for the same devices as you.
2. It takes too long to settle the output voltage.
3. When I reduce the reservoir capacitance to settle the output voltage faster, it enters a self-resonant converter mode between the inductance and the MOSFET capacitance.
 
  • #24
Baluncore said:
Re: Post #17. How can you measure a stable output voltage, when you have no load, what stops the output voltage from continuing to rise ?
Re: Post #22. The two curves need to be simulated and measured at the same switching frequency, and the load must be specified.

I cannot simulate your circuit in LTspice because;
1. I do not have models for the same devices as you.
2. It takes too long to settle the output voltage.
3. When I reduce the reservoir capacitance to settle the output voltage faster, it enters a self-resonant converter mode between the inductance and the MOSFET capacitance.

sir, my concern is the simulated graph and what i got is not the same. what is the reason for this.
and as you said the 2 corves in real time is measured at the same switching frequency. i didn't connect any load, as of now i am just measuring output voltage.

i am able to measure the output voltage when i am changing the duty cycle. since voltage stops to increasing at some point of time.
 
  • #25
core7916 said:
and as you said the 2 corves in real time is measured at the same switching frequency.
core7916 said:
Red line : 300khz switching frequency.
grey line : 100khz . ( simulated in multisim).
They are at a different frequency, you must make them the same.

core7916 said:
i am able to measure the output voltage when i am changing the duty cycle. since voltage stops to increasing at some point of time.
Why does it stop when there is no load ?
 
  • #26
Multiple Threads on the same question have been merged
Hello,
i am designing a boost converter which will provide output of more than 200v (input is 12). since i need to drive piezo load. i already designed and tested the circuit , but the output of the circuit is not expected as calculation. (not used feedback).
i am using this equation to calculate the output voltage
Vout/Vin= 1/(1-D) ---- (1)

i just randomly choose the value of components which has ratings of 400v and 30A. cuz i dont know exactly how to calculate value of each component.
i choose the value of components as
diode with rating of 400v and high current.
capacitor 390uh
mosfet 400v with 30A rating--( using ir2110 to drive the gate)
inductor as 10uh.
switching frequency is 300khz( tested withn 200khz and also with 500khz -- getting random outputs.).
when i am testing the circuit the circuit works and boosts the voltage for higher duty cycle, but not the result as i calculted from equation 1.
can anyone tell me what is the fault in my circuit, and how to correct it.'

can any one give me practical boost converter graph so that i can relate output of my current design.
is it necessary to use the voltage feedback to boost converter.
i dont any any clue, give any reference document, please help.

thank you.
 
  • #27
core7916 said:
is it necessary to use the voltage feedback to boost converter.
i dont any any clue, give any reference document, please help.
We need to know what circuit you are using. Please attach the circuit to a post.
Both variation of duty cycle, and variation of load, will determine output voltage.
Voltage feedback is highly recommended.
Have you tried to simulate the converter with LTspice?
 
  • #28
boost circuit design.PNG

this the circuit i am using. please dont go with the part numbers of mosfet and diode, what i am using is different from the schematic.
inductor- SRP2313AA-100M
mosfet - STP45N40DM2AG
diode - DPG30I400HA
my load has resistance of 200kohms and 3uf. i simulated the circuit with multisim not in ltspice.
sir in simulation i am getting the output voltage as caluclted using equation 1. but in real time results are not even close.
for ex, at 30% duty my simultion output will be26.3 v but practically iam getting 100v.

sir i tried design the feedback circuit, i dint find any suitable ic. since i have to automatically adjust the output voltage in certain conditions( variable reference voltage). i didnt find suitable ic which will do this work.
 
  • #31
I think the problem is, that you have built a current pump, and expect it to produce a fixed voltage. The output voltage will be highly dependent on the load.

It will be necessary to employ output voltage sensing, and control feedback.

The feedback ratio can be made adjustable.
 
  • #32
thank you for your reply,
sir i am not getting meaning for current pump. what is it, in general boost circuit how we will decide it is current pump or not.
 
  • #33
V=LdI/dt , dI=V/L dt let dt =1e-6, V= 12, L = 1e-5
dI = 120 A unless limited by RdsOn, DCR. !!!

I might expect some startup problems.
 
  • #34
RdsON + RInductor ≈ 0.07Ω
L = 10-5H

time constant = L/R
≡ 10-5 / 7x10-2
= 1.43 x 10-3
Time Constant = 1.43mS or 1430uS

switching frequency = 300kHz
assume 50% duty cycle: On Time = 1.67uS

1430 / 1.67 = 856
This shows that the L/R time constant (time to charge the inductor) is 856 times longer than the on-time of the transistor. It will take a LONG time to transfer any energy to the output! (856 switching pulses if there are no losses)

@core7916, I strongly suggest you do as @Baluncore suggested and learn from the following site.
Baluncore said:
 
  • #35
These problems can be found simply by looking what fails when so much power is being pumped by examining the impedance and energy (heat) in every part with limits on peak and RMS current specs.

Adding current feedback to shutoff the FET will help as well as adding DCR, RdsON, Rs, ESR to the schematic.

But a priori you must provide your design specs for power and energy loss you expect. DCR, RdsOn, ESR, Rs or Vf @ 50A of diode must also be listed.Hypothetical problems

The load at 200V into 200k = 1mA or 200 mW without the piezo is not a problem yet but the resistive losses above and lack of current limit for the inductor, are a problem. e.g. if Cap C*ESR=T= 10us ( low ESR) then ESR=10/330 = 30 mohm. If L has a DCR = 6 mohm then V/R=12/36m = 333 amps with FET off during startup to say 20V due to high Q, voltage will gain at peak cycle for resonant frequency.

Now give us your real values.
 
  • #36
TonyStewart said:
These problems can be found simply by looking what fails when so much power is being pumped by examining the impedance and energy (heat) in every part with limits on peak and RMS current specs.
I really don't think there is a problem with the magnitude of the current.

L = 10 uH; V = 12 volt; f = 300 kHz; Duty = 30%.
Tcycle = 3.333 usec; Ton = 1 usec; Toff = 2.333 usec.

When the switch closes, the inductor is connected across the 12 V supply.
V = L·di/dt; ∴ di/dt = V/L = 12 V / 10 uH = 1.2 amp per microsecond.

With a 1 mA load current, it will take almost 1 msec for the output to rise to about 160 volts.
 
  • #37
Baluncore said:
I really don't think there is a problem with the magnitude of the current.

L = 10 uH; V = 12 volt; f = 300 kHz; Duty = 30%.
Tcycle = 3.333 usec; Ton = 1 usec; Toff = 2.333 usec.

When the switch closes, the inductor is connected across the 12 V supply.
V = L·di/dt; ∴ di/dt = V/L = 12 V / 10 uH = 1.2 amp per microsecond.

With a 1 mA load current, it will take almost 1 msec for the output to rise to about 160 volts.
When the switch opens, the inductor current does not stop and thus accumulates every cycle,;

1.2A, 2.4A, 3.6A, 4.8A, 6.0A, .. when does it peak? about half a cycle later at the LC resonance ~ 2.5kHz about 200 us !!!

The ideal solution , I believe is the autotransformer at the piezo resonance with AC using a forward regulator with feedback. ie. NFET primary switching at 50% with turns ratio to open circuit secondary voltage. i.e. not a flyback.
 
  • #38
TonyStewart said:
When the switch opens, the inductor current does not stop and thus accumulates every cycle,;
Negative. When the switch opens, the inductor voltage is reversed as it dumps the current through the diode, into the reservoir capacitor. Since the voltage during flyback is reversed, di/dt is negative, so the current falls rapidly to and through zero, then rings or oscillates a bit while waiting for the next Ton, during which the current rises again from near zero, to 1.2 amps.
 
  • #40
core7916 said:
i am not getting meaning for current pump
A similar way of saying this is that your converter is operating in discontinuous conduction mode (DCM) because of the very low load current. So, the DC gain won't be ##\frac{1}{1-D}##, that is for continuous conduction mode (CCM).

I suspect you also have other implementation problems. But first, you must study some of the theory behind these circuits. You probably won't succeed with guessing, nor are we likely to make it work in your lab with occasional social media comments.
 
  • #41
Baluncore said:
Negative. When the switch opens, the inductor voltage is reversed as it dumps the current through the diode, into the reservoir capacitor. Since the voltage during flyback is reversed, di/dt is negative, so the current falls rapidly to and through zero, then rings or oscillates a bit while waiting for the next Ton, during which the current rises again from near zero, to 1.2 amps.
Please Read again. I meant the inductor current in the inductor will not stop ( for 200 us until it peaks due to resonance) . It will accumulate and the L/R=Tau >> dt so it WILL not decay as I said before.
 
  • #42
TonyStewart said:
I meant the inductor current in the inductor will not stop ( for 200 us until it peaks due to resonance) . It will accumulate and the L/R=Tau >> dt so it WILL not decay as I said before.
That is not what LTspice simulation shows.
The 30% duty cycle at 12 volts, and the much higher negative voltage during flyback, guarantees the inductor current reaches zero very rapidly.
I think you must be assuming the duty cycle is close to 95%, so there is insufficient time for flyback to complete before the next Ton starts.
 
  • #43
No I used <=50% d.f.

If you turn off the FET at startup, then read the max. voltage output , that overshoot will tell me what Q you chose from LC parts. (step response)

Step Overshoot = ?


Idc startup = Vin/(DCR+Rs+ESR)
What is your max current?

i.e. if startup is CCM there may be problems with inductor saturation from excess current.
 
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  • #44
TonyStewart said:
No I used <=50% d.f.

If you turn off the FET at startup, then read the max. voltage output , that overshoot will tell me what Q you chose from LC parts. (step response)

Step Overshoot = ?


Idc startup = Vin/(DCR+Rs+ESR)
What is your max current?
This is not a resonant or quasi-resonant design. It is a "square wave" (i.e. conventional SMPS), where the current waveforms can be approximated well with linear slopes. In other words the switching period is much shorter than the dominant resonances between the (big) components and also small compared to a normal non-linear step response of the inductor. On the time scale of the switching of the transistor/diode, you can approximate the capacitor voltage as constant and the inductor current as the constant slope portion of the beginning of an exponential step response. Which is really just the voltage across it divided by L. The voltage across the inductor is controlled by the switches (since the load voltage doesn't change quickly), except during the DCM dead time (often called D2), when there is no current and the voltage is floating uncontrolled because the diode and transistor are both off.

This case is even more extreme, since the inductor current is discontinuous in each cycle, it will retain no historical memory of previous switch cycle. i.e. it does not represent a state of the system. The inductor current is controlled by the switch controller (and the rest of the circuit, like the load) and on the time scale of resonances you refer to acts more like a programmed current source, or as @Baluncore said " a charge pump".

For 10uH and 390uF the resonance is at 2.5KHz. He is switching at 300KHz.

For more on this look at that TI app. note I posted a bit ago.
 
  • #45
FET modelled for 38 mΩ , DCR and low ESR shown .> 50 A @ 57 us with a 5A inductor rising about 1A per us.
1684012097534.png
 

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  • #46
TonyStewart said:
if startup is CCM there may be problems with inductor saturation from excess current.
Yes, a good point. The high load resistance may make you think there will be voltage at the output to discharge the inductor. But with really big output caps. the voltage may not build up quickly enough to keep the inductor current low. This can also be addressed by a soft-start feature in the controller, which is common.

This is a good argument for a current mode controller. In any case, I have never designed a SMPS that didn't have some flavor of overcurrent protection for the switches.

Also good to point out that startup and steady-state operation must be considered separately.

PS: The underlying point, that I think we all have suggested at some time, is that you need some sort of control circuit. I've never seen a real world SMPS without one, of any topology.
 
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  • #47
I hope you realized 390 uF was deleted for a good reason.

What is the real piezo load in nF, ohms?
1684015589478.png
 
  • #49
Thread paused for Moderation...
 
  • #50
After merging 2 threads about the same question (and reminding the OP not to do that), this merged thread is reopened.
 
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