Will CMOS Logic Gates Cause Instability in My Circuit Design?

[Shadax]

Basically, I'm trying to generate a short pulse when the user pushes a button using a CMOS gate and a rudimentary RC charging circuit. It all simulates fine in Multisim, but I'm concerned what will happen when I run this for real (still waiting for parts in the mail). Here's the diagram:

[PLAIN]http://img819.imageshack.us/img819/876/timing.png

The IC will be a CD4075 triple input OR-gate, and it will run off a 5V USB supply. The other inputs will be connected to identical circuits, so at the end, you get a pulse when any of the buttons are pushed. From what I can gather, Multisim just assumes "if <2.5V, go low, if >2.5V, go high", but I'm unfamiliar with how real CMOS gates handle metastability, and the datasheet is no help (it just says "1.5V maximum low, 3.5V minimum high").

The timing does not have to be that accurate (a pulse length anywhere between 25ms to 100ms should be fine), but I'd still like to know at what point on the capacitor charging curve to expect the output to go back low so I can make calculations (I made them for 2.5V initially). What I'm afraid to hear is that, as the input voltage reaches the metastable point, the output may go low or high randomly. That is NOT acceptable for my purposes, so I need to know whether or not that will happen.

One more thing: as the capacitor discharges, will the -5V on the input harm the gate? I can put in a schottky diode if it will, but I have very little room on my circuit board, so I want to avoid all unneccesary components.

 

[phyzguy]

This should work. To answer your second question, I don't think the -5V will harm the Or gate. It almost certainly already has a diode protection on the input that will clamp the input and prevent it from going more than a diode drop below ground. On the first question, the manufacturers statement of 1.5V max low, 3.5V min high means that they will not guarantee what the output will be when the input is between 1.5V and 3.5V, so it might switch anywhere in between those two voltages. But if you don't care about the exact pulse width, this shouldn't be a problem. The biggest concern is that the output might "chatter" - i.e. bounce between high and low while the input is discharging, resulting in more than one pulse each time the button is pressed. You could put some feedback between the output and the input (look up a Schmitt trigger) to prevent this.

 

[uart]

Does the output pulse have to be clean? Because it probably won't be with that circuit. It's highly suseptible to switch bounce on the leading edge and noise on the trailing edge.

It might work depending on what you're driving with the output pulse (but since you haven't told us that then there's no way to tell). If a clean output pulse is required then there are much better ways to do it.