Designin (very simple) oscillator circuit

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Discussion Overview

The discussion revolves around the design of a Clapp oscillator circuit using NMOS transistors, focusing on the resonant frequency calculation, biasing networks, and circuit modeling. Participants explore theoretical and practical aspects of oscillator design, including component selection and circuit behavior at different frequencies.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested
  • Mathematical reasoning
  • Homework-related

Main Points Raised

  • Some participants discuss the need to derive the formula for resonant frequency and question whether to use small-signal equivalent circuits for NMOS transistors.
  • There is mention of the importance of the source resistor in the feedback network and its impact on circuit stability.
  • One participant expresses confusion regarding the presence of AC signals in the circuit, clarifying that the oscillator generates AC but is powered by DC.
  • Participants suggest using specific values for inductors and capacitors to achieve oscillation at lower frequencies, while noting that the circuit may not typically operate at 2.43 GHz.
  • Some participants propose using T-models for NMOS to analyze output and input impedances, while others provide formulas for calculating resonant frequency based on inductor and capacitor values.
  • There is a discussion about the challenges of biasing networks and the necessity of ensuring proper DC conditions for oscillation.
  • One participant mentions the need for impedance matching and the use of transmission lines at higher frequencies, indicating a shift in design considerations.

Areas of Agreement / Disagreement

Participants express various viewpoints on the design and operation of the Clapp oscillator, with no consensus reached on the best approach or specific component values for the intended frequency of 2.43 GHz. Some participants agree on the importance of DC biasing and resonant frequency calculations, while others highlight differing opinions on the circuit's operational frequency range and modeling techniques.

Contextual Notes

Limitations include unresolved assumptions regarding the circuit's operational frequency, the complexity of biasing networks, and the appropriateness of using certain formulas for resonant frequency at higher frequencies.

Who May Find This Useful

Readers interested in oscillator design, NMOS transistor modeling, and resonant frequency calculations may find this discussion relevant.

dalarev
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I'm using the Microwave Office simulating software to design a practice clapp oscillator (picture attached).

I'm at the beginning stages of this project. I will have to design a biasing network for this circuit but, before that, I need to find the formula to find the resonant frequency for this general schematic.

My question is, using an NMOS, should I replace the circuit by its small circuit equivalent circuit? That would help me by ignoring the sources (since it only has DC sources). Also, would I have to consider the internal capacitances of the NMOS?
 

Attachments

  • Clapp_oscillator.png
    Clapp_oscillator.png
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dalarev said:
I'm at the beginning stages of this project. I will have to design a biasing network for this circuit but, before that, I need to find the formula to find the resonant frequency for this general schematic.

Here is the formula, it's not hard to derive:

http://en.wikipedia.org/wiki/Clapp_oscillator
My question is, using an NMOS, should I replace the circuit by its small circuit equivalent circuit?

yes, and choose the transistor model you want to use.

That would help me by ignoring the sources (since it only has DC sources). Also, would I have to consider the internal capacitances of the NMOS?

yes, you can design it by knowing the s-parameters or h-parameters if you are working at lower frequencies.

What frequency?
 
When you get to the DC biassing, have a look at the attached picture.

The source resistor is a critical component in this because it is directly across one of the capacitors in the feedback network. You also have to take your output from across this resistor. Its value depends on the FET.
Some versions of this circuit show a RFC (Radio Frequency Choke) in series with the source resistor. This is an untuned inductor of about 1 mH.

This circuit is notoriously difficult to get going and it has various other names that are similar to its proper name. None of them are complimentary.

Especially, the two series capacitors need to be chosen so that they have less reactance than the tuning capacitor for stability, but not too much less or the oscillator will not oscillate.

If you do get it going, it is quite a stable oscillator.
 

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what said:
Here is the formula, it's not hard to derive:

http://en.wikipedia.org/wiki/Clapp_oscillator
Actually, I was told explicitly to ignore that incorrect formula by my professor. Or maybe he just wanted me to derive it myself, which I agree with.


yes, and choose the transistor model you want to use.
I'm going with a common drain NMOS, just because I'm more comfortable with that (as opposed to BJT).

yes, you can design it by knowing the s-parameters or h-parameters if you are working at lower frequencies.

What frequency?
I'm confused by the first sentence. Didn't think that had anything to do with this project.

I am working at ~2.43 Ghz.



vk6kro,
I will put your suggestions to the test when I am at the lab later on today, thanks a bunch for the material.

I am a bit concerned, though, that I am practically lost when it comes to DC biasing networks. Am I correct in assuming this schematic will only have DC sources, and no AC (small) signal generators? I am still a bit confused about that part.

Thanks all for your help.
 
This circuit is an oscillator. That means it generates AC but has to be supplied with DC power.
The output would be taken via a series capacitor from the top end of the source resistor

This circuit would not normally be used at 2.43 GHz, but it may work in a simulator.

It would normally be used between 3 MHz and 12 MHz, roughly. It would certainly need the DC conditions to be right before it oscillated.

For oscillation at about 6.5 MHz, values like 10 uH for the coil, 100 pF for the tunable capacitor and 300 pF for the series capacitors might get you somewhere near oscillation. Then you can adjust the variable capacitor to see what sort of frequency output you can get.
 
vk, I have subtly changed schematics but still followed your advice for the DC biasing. I am now trying to find the resonant frequency by drawing this (dynamic) equivalent circuit. I have attached a picture though, in case you're interested in seeing what I'm seeing.
 

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This may be bordering on the Homework subforum, but I need a bit of guidance in deriving a formula to find the resonant frequency.

I have used the T-model for the NMOS and found that the out impedance, according to my schematic up there,

Zout = Rs / (s*Rs*C2 + 1)

Zin, excluding the transversal capacitor C1 (joined between Gate and Source) :

Zin' = (s^2*Rg*L*Cv + 1) / (s^2*L*Cv + s*Rg*Cv + 1)Any quick suggestions on what might give me some insight?
 
The resonant frequency is that of the inductor with 3 capacitors in series across it. You know the formula for capacitors in series.

There is a standard formula for working out resonance.
It is F = 1 / (2 * pi * Square root of { L * C } )

A convenient form of it for RF is as follows:

F = Square root of {25330.3 / (L * C)}

where F is in MHz... C is in pF ...and L is in uH

eg if C =60 pF L = 10 uH then F = 6.5 MHz

If you use an enhancement mode Mosfet you will need to forward bias it by about 2 volts relative to the source.
 
Clap oscillator will work fine at a few MHz, but at 2.4 GHz, transmission lines and resonators are used. Transistors are modeled as two-port networks with s-parameters, need to do impedance matching, get Rollets' stability factor for starters etc
 

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