Is solid state device physics a must learn subject to design circuits

[dexterdev]

Hi,

Is solid state device physics a must learn subject to design analog circuits.


-Devanand T

 

[f95toli]

It depends on what you mean by "circuit".
If you are talking about components on a circuit board, then probably no.
If you are mean designing the components themselves (i.e. integrated circuits), then some solid-state physics might be a good idea.

 

[dexterdev]

If you are mean designing the components themselves (i.e. integrated circuits), then some solid-state physics might be a good idea.

Is that really 'Some'...

 

[f95toli]

Is that really 'Some'...

In order to design ICs you would need to know some of the basics; i.e. what a Fermi level is, otherwise you wount be able to understand even basic semiconductor physics.
Obviously, HOW much you need to know will depend on what you are doing; but most good analogue engineers that I've come across had at least some understanding of the physical difference between a BJT and a FET; and in order to understand that you need to know some solid state physics (at the level of what is typically covered in an undergrad course)

 

[cabraham]

If you are designing circuits where the speed of the active devices is limited by internal charge storage, geometry, etc., then yes, you need some device physics knowledge to optimize the design. At low speeds, probably not, although there are occasional applications where device physics comes into play.

I recommend at least one semester of device physics. Even if you do not use it on the job, it is very good to know. I like knowing things beyond a mere surface understanding. Go for it by all means.

Claude

 

[rbj]

Is solid state device physics a must learn subject to design analog circuits.

It depends on what you mean by "circuit".
If you are talking about components on a circuit board, then probably no.
If you are mean designing the components themselves (i.e. integrated circuits), then some solid-state physics might be a good idea.

Is that really 'Some'...

not all EEs who design ICs are designing the devices (the transistors, little silicon resistors, the MOS devices, etc.). many IC designers are circuit designers laying out the devices that other designers design onto the silicon and connecting them. that is 95% circuit design, very similar to if the devices were external on a PC board with some obvious exceptions (much shorter path lengths, coupling to substrate). then the answer is "Some", maybe very little.

but if you are designing the devices, the geometry of the device and the parts inside the device, the doping of the various parts, how many layers they are isolated from the substrate, the metal oxide parts, all of that design is more physics than it is circuit design. then you better know you ebers-moll equations and other similar models.

 

[berkeman]

I recommend at least one semester of device physics.

I agree with this. A typical textbook is Ashcroft & Mermin:

https://www.amazon.com/dp/0030839939/?tag=pfamazon01-20

I also think it is helpful to study semiconductor device modeling with SPICE, since fairly often you may need to tweak the models (or build new ones) for your circuit simulations. I found this book by Antognetti & Massobrio to be very helpful for this:

https://www.amazon.com/dp/0071349553/?tag=pfamazon01-20

.

 

[carlgrace]

not all EEs who design ICs are designing the devices (the transistors, little silicon resistors, the MOS devices, etc.). many IC designers are circuit designers laying out the devices that other designers design onto the silicon and connecting them. that is 95% circuit design, very similar to if the devices were external on a PC board with some obvious exceptions (much shorter path lengths, coupling to substrate). then the answer is "Some", maybe very little.

but if you are designing the devices, the geometry of the device and the parts inside the device, the doping of the various parts, how many layers they are isolated from the substrate, the metal oxide parts, all of that design is more physics than it is circuit design. then you better know you ebers-moll equations and other similar models.

It's very, very difficult to design high-quality integrated circuits without a pretty good understanding of how transistors work. Square-law MOSFET equations are pretty much fictitious by now.

You're right in that you won't need to know all that much about doping and carrier transport and the like, but you'll need to know a fair bit more about device physics than a PCB designer.

 

[rbj]

It's very, very difficult to design high-quality integrated circuits without a pretty good understanding of how transistors work. Square-law MOSFET equations are pretty much fictitious by now.

You're right in that you won't need to know all that much about doping and carrier transport and the like, but you'll need to know a fair bit more about device physics than a PCB designer.

whether the device is a transistor or something else, understanding how the device works is about doping and carrier transport and potential barriers and Fermi energies and the such.

understanding how to use the device is not the same. to use the devices, the physics you need to know about for lumped element circuits are Kirchoff's Voltage Law for each loop, Kirchoff's Current Law for each node, and the Volt-Amp characteristics for each element or device in the circuit. the rest is math. i am not saying that the circuit designer need not know how to do math, including dealing with non-linearities. and i am not saying the circuit designer need know nothing about the devices, he or she must know about the volt-amp characteristics and what parameters affect these volt-amp characteristics.

but the volt-amp characteristics is sort of the work product of the device designer, not the circuit designer. both of these engineers need to know something about what the other does, but it's the device designer that needs to know his solid state physics. the circuit designer needs to know the volt-amp characteristics, KVL, and KCL, and that person can do circuits.

if the circuit is on a common substrate, that circuit designer has to worry a little about the coupling (via a reversed-biased junction) to the substrate and how that might affect the behavior of the circuit. there is a very small leakage current and there is a very small capacitance. it's like every node in the circuit is connected to the substrate via a little reverse-biased diode or very tiny capacitor. at high frequencies that's a problem and the circuit designer needs to worry about that. but once the device designer gives the circuit designer the diode or ebers-moll or whatever V-A characteristics, i don't think the circuit designer need worry too much about the physics inside. as long as the devices are isolated.

 

[rbj]

I recommend at least one semester of device physics.

I agree with this.

well, one semester was required when i was an undergrad. they later changed the requirement to a choice between Elementary Solid State Physics and Engineering Optics.

but once i started doing circuits with lumped elements, i didn't really need to deal with the device physics anymore. just the volt-amp characteristics.

i also hated how the Millman or the Millman and Halkias books mixed around the two disciplines (device physics and circuits). i never thought that was pedagogically necessary.

 

[carlgrace]

whether the device is a transistor or something else, understanding how the device works is about doping and carrier transport and potential barriers and Fermi energies and the such.

understanding how to use the device is not the same. to use the devices, the physics you need to know about for lumped element circuits are Kirchoff's Voltage Law for each loop, Kirchoff's Current Law for each node, and the Volt-Amp characteristics for each element or device in the circuit. the rest is math. i am not saying that the circuit designer need not know how to do math, including dealing with non-linearities. and i am not saying the circuit designer need know nothing about the devices, he or she must know about the volt-amp characteristics and what parameters affect these volt-amp characteristics.

but the volt-amp characteristics is sort of the work product of the device designer, not the circuit designer. both of these engineers need to know something about what the other does, but it's the device designer that needs to know his solid state physics. the circuit designer needs to know the volt-amp characteristics, KVL, and KCL, and that person can do circuits.

if the circuit is on a common substrate, that circuit designer has to worry a little about the coupling (via a reversed-biased junction) to the substrate and how that might affect the behavior of the circuit. there is a very small leakage current and there is a very small capacitance. it's like every node in the circuit is connected to the substrate via a little reverse-biased diode or very tiny capacitor. at high frequencies that's a problem and the circuit designer needs to worry about that. but once the device designer gives the circuit designer the diode or ebers-moll or whatever V-A characteristics, i don't think the circuit designer need worry too much about the physics inside. as long as the devices are isolated.

I don't mean to sound rude but have you designed many integrated circuits? You keep saying Ebers-Moll but the majority of ICs these days are designed in CMOS processes. You can't even get access to a bipolar process unless you work for one of a small number of companies, and even if you're using a BiCMOS process they invariable use hybrid-pi models and not Ebers-Moll.

As for a designer not needing to worry about devices, I would reckon that designer would be greatly limited in the number of circuits he or she could successfully bring to volume production. In fact the key skill of a designer is to design circuits that function in spite of the limits imparted by the circuits. Particularly in nanoscale processes.

For example,

1. You have a gate leakage problem where a node is discharging too fast. What do you do?
2. You have an issue where the threshold voltage seems to be larger for large devices, but only when they are closely packed. What do you do? What do you suppose is going on?
3. The output resistance of a device is lower than you want. What do you do?
4. You heard at the water cooler that you can get lower gate noise is you contact the MOSFET gate on both sides? That creates a difficult interconnect problem. Should you do it? Is is true or is it an old wive's tale?
5. You heard that the speed N and P channel devices are correlated (i.e. if N is faster than nominal, P is probably too). Is this true? How would knowing this help protect you from overdesigning a circuit?
6. A coworker told you to keep your current density below a milliamp per micron. Why? Should you trust your coworker?
7. At a design review your boss says your op amp has too much input-referred noise. Why?

You see where I'm going with this? Designing an IC is waaaaaay different from designing a PCB. Maybe you confused a circuit designer with a layout technician? In that case the designer should be directing the work. Knowing about the physics doesn't mean drawing Fermi diagrams or solving Shroedinger's Equation but it means knowing a hell of a lot more than I-V curves. As someone who's read far more of the BSIM-4 manual than he would have liked to, I assure you that IC designers have to know about device physics.

 

[rbj]

I don't mean to sound rude but have you designed many integrated circuits?

quite alright. nothing analog.

i know it's different. I've been involved with an ASIC design and the Verilog guys never talked about the physical level, other than propagation delay. not within my hearing, anyway. they plopped down devices by writing logic and functional equations.

 

[sophiecentaur]

Whatever course you decide on, remember things are not set in stone. If you approach the course in the right spirit and get yourself a good qualification, you will be in a better position to know what is actually 'for you' and to change direction in an informed way. At this stage, you really aren't in a position to know the future (no one is) and, if you need to modify your trajectory later, no worries.
But stick at whatever you choose until the end. Nothing you learn will have been wasted.

 

[carlgrace]

quite alright. nothing analog.

i know it's different. I've been involved with an ASIC design and the Verilog guys never talked about the physical level, other than propagation delay. not within my hearing, anyway. they plopped down devices by writing logic and functional equations.

I don't know why it didn't occur to me you meant digital ASIC design. In that case I wholeheartedly agree with you. Unless you are really pushing the performance boundary of your process, then designing purely digital circuits in Verilog or VHDL is more similar to programming in a parallel language than it is to analog design.

I suppose I see everything through an analog lens since I do primarily analog and high-speed digital design (which is pretty much analog anyway).

 

[eq1]

You can't even get access to a bipolar process unless you work for one of a small number of companies

TSMC, among others, offer bipolar processes.
http://www.tsmc.com/english/dedicatedFoundry/technology/power_ic.htm

With multi project wafers you can get on this node fairly cheaply. For example: Cost is about $1500/part for a 40 part run with a ~25mm^2 die on TSMC 0.35um BCD. A bit expensive for the typical hobbyist but certainly within reach of a small business.

Here is one example way to do it:
http://www.mosis.com/vendors/view/tsmc/processes