I am building a positive peak detector circuit using AD829 opamps. I have attached my current circuit I built in multisim. I used a "superdiode" configuration on the charging circuit so that I simultaneously get the charging across the capacitor, no discharging during the falling edge, and also no attenuation due to the diode. The MOSFET is used to short the capacitor during the negative half cycle of the input wave. In this way, the positive peak detector is self resetting. I used another AD829 set up to rail when the supply goes negative to gate the transistor and short the cap. Well - it all works pretty good (See the attached waveforms) Except there are certain specifications this circuit has to be able to maintain, a voltage input of from 0.2V to 2.5V over a frequency range of 10Khz to 500Khz. I have attached some pictures showing the input vs. output waveforms for different combinations of frequency and voltage My main question is: 1)Why is the capacitor discharging on the falling edge? WHy is it not able to hold it's charge? The diode is in reverse bias. I even removed the mosfet from the circuit, it really cannot hold the charge but this only seems to be the case at low frequencies (It's reactance?) 2) Why is the ascension linear for high frequency and high voltage? (the linear charging path of the cap ie it does not follow the source) (Vcc is too low?) I am having issues with the specs because it seems I need to change Vcc for certain configs whilst I need to change cap values for others. I am having issues is there any theory that can be given to perhaps point me in the right direction? ANY consideration appreciated.