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Boolean Logic design help

  • #1

Homework Statement



Using NAND, AND OR, &/or NOR gates build a vote counting machine. It should light an LED when majority votes are true (or answer "yes"). Assume 4 input votes only.


Homework Equations



Boolean Logic

The Attempt at a Solution



So I know the solution in terms of algebra, which is ABC + ABD + ACD + BCD (where ABCD are the 4 input votes) and I know at the end I need two OR gates summing up to one single OR gate. Not sure how to design the beginning though.

I am also looking for a way to simplify it since I have to build the whole thing out of NAND gates only.
 

Answers and Replies

  • #2
berkeman
Mentor
57,286
7,272

Homework Statement



Using NAND, AND OR, &/or NOR gates build a vote counting machine. It should light an LED when majority votes are true (or answer "yes"). Assume 4 input votes only.


Homework Equations



Boolean Logic

The Attempt at a Solution



So I know the solution in terms of algebra, which is ABC + ABD + ACD + BCD (where ABCD are the 4 input votes) and I know at the end I need two OR gates summing up to one single OR gate. Not sure how to design the beginning though.

I am also looking for a way to simplify it since I have to build the whole thing out of NAND gates only.
Your problem statement doesn't confine you to 2-input gates. It only takes two levels of logic to do it with AND-OR logic, right?

Are you constrained to only using 2-input NANDs for the final circuit? How do you make an OR out of a NAND? Have you looked at the inverted function in case it offers some optimization? Please show us more work...
 
  • #3
Yeah we can have 4 inputs, but I am still not sure about you saying using the two level AND-OR logic.
I know how to construct the different kind of gates from NAND gates now, just need a clear concept how to solve this problem.
 
  • #4
berkeman
Mentor
57,286
7,272
Yeah we can have 4 inputs, but I am still not sure about you saying using the two level AND-OR logic.
I know how to construct the different kind of gates from NAND gates now, just need a clear concept how to solve this problem.
Show us your initial truth table and initial logic implementation.
 

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