How To Implement This Function With 2 Input Nand without

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The discussion focuses on implementing multiple logical functions using only 2-input NAND gates without inverters. Participants highlight the challenge of needing 3-input NAND gates for certain functions while only having access to 2-input NAND gates. They suggest using logic simplification techniques, such as Karnaugh maps and De Morgan's laws, to reformulate the equations. One contributor notes that some functions, like WXY, may be impossible to implement without inverters. Overall, the conversation emphasizes the importance of logical simplification in achieving the desired implementations.
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How To Implement This Functions With 2 Input NAND without using any gates as inverter ??

A=WX’Y’+W’X+W’Y
B=WX’Y’+WX’Z’
C=W’X+WX’Y’
E=Y’Z+W’Z+WX’Y
F=WX’+W’XY+WY’Z
D=WX’+W’XY+WY’Z
G=W’X+WX’Y’+WY’Z
H=WX’Z’+WY’Z
J=WY’+W’X+W’Y

see the attachment , the question in part e

there are more than three functions that need 3 Input NAND and some minterms with 3 literals. We have only one 7410 package with 3 Input and plenty of 7400 package
 

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Zayer said:
How To Implement This Functions With 2 Input NAND without using any gates as inverter ??
Read your PDF, it gives the solution for the NOT gate problem really early on.

there are more than three functions that need 3 Input NAND and some minterms with 3 literals. We have only one 7410 package with 3 Input and plenty of 7400 package
Pull out all those old logic simplification rules to good use, and try a karnough map and the like. Just looking briefly at your list, I see one problem where you use the distributive rule to factor out a term so the entire thing can be implemented with two input NANDs. Most of your other problems also simplify as such.
 
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Thanks
I obtained another set of equations

A’=WY+WX+W’X’Y’
B’=W’+X+YZ
C’=WX+WY+W’X’
D’=F’=W’Y’+W’X’+WXZ’+WXY
E’=Y’Z’+XZ’+W’Z’+WXY
G’=WY+W’X’+WXZ’
H’=W’+YZ+XZ’
J’=WY+W’X’Y’

W'X'Y WXY WXZ'

are the only prime implicants that needs 3 Input NAND(if we didn't use inverter)

I think it's impossible to implement WXY with only 2 Input NAND gates without using inverters
 
Zayer said:
WXY with only 2 Input NAND gates without using inverters
That's what slipped my mind anyway. You've got to use de Morgan's law to put everything in AND form anyway, which will probably end up giving you the NAND constructs when you simplify.

De Morgan's Law:
'A + 'B = '(AB)
'(A+B) = ('A'B)
 
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