Learn How to Connect 74LS90 Decade Counter for a 4-Digit 7 Segment Display

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To connect a 74LS90 decade counter for a four-digit 7-segment display, the counters should be daisy-chained by linking the qD output of one to the clock input of the next. A latch is necessary between the counter outputs and the decoders to hold the count periodically, preventing continuous display changes. It's crucial to reset the counters after the latch signal to avoid displaying all zeros. Users are encouraged to explore CMOS logic for potentially better options and consider using a PIC microcontroller for a more integrated solution. Experimentation with actual components and data sheets is recommended for practical understanding.
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Hi all,

I am designing a four digit 7 segment display just using IC 74LS90 decade counter and 74LS47 BCD to 7 segment driver. My question is how to link the 74LS90 decade counter together so that the four 7 segment display will show me the result?
 
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Are you asking how to cascade multiple 7490's to get four decimal digits of counting? If so it looks like one would use the qD -- high order output bit -- as the clock input for the next decade. It seems that a High->Low transition will happen on the rollover from 9 to 0, so your counter will be in phase if the chips clock on Low which it looks (from quick review) to be the case.
 
Is the circuit in the attached Figure working? I want to get an electrical energy (kWh) output so i need a decade counter in the circuit. The input is the output frequency from VFC LM131, and i am using 74ls90 and 74ls47 and 7 segment display.
 

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That looks like the right idea. It would be better if you labeled the connections so we could tell what's what... For instance I don't know what the line connecting all the counters and the latch is. Also I don't know what you are counting. If it's something like pulses per second then that mystery latch line needs to be clocked every second somehow.
 
Well I get it from an article and i am not fully understand the connection. It does not label in the connection and that is why i post it here to get further detail =D
 
OK, I think I see the problem...you have no idea what you are doing...

The "usual" brute-force way to do this is sketched in the drawing you provided. My guess is that the counters are daisy-chained the way I said before, output qD to the clock input of the next higher order counter. Then you need to have that "latch" between the counter outputs and the decoders to grab and hold the count on some periodic basis. Otherwise the displayed count will just keep spinning around before your eyes. Just after the latch data "hold" signal you need to reset all the counters so they start from zero again. That's the mystery line connecting them all and it needs to be driven by some regular periodic oscillator, so that you get, for instance, the actual count every second. You need to be careful that the latching happens before the counters are reset or all you'll get will be 0000's. So some subtleties abound here...

You might be able to find counters with built-in latches...I'm not sure as I haven't used much discrete logic in the last 20 years. By searching more, you may also be able to find better schematics for something that will actually work the way you want. I suspect that the frequency you are counting is not _way_ high, so you might have more success with CMOS logic (40xxx series) where there may be more options than good'ole 74xx TTL.

Another approach would be to use a PIC micro-controller to do all the counting and display driving, but that means learning to program along with everything else.

In any case I recommend that you get some parts and their data-sheets and a breadboard and start experimenting.
 
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