Looking for some information on the limits of copper circuitry

AI Thread Summary
The discussion centers on the limitations and techniques for producing small-scale copper circuitry. Current technologies face challenges in 3D printing copper due to the high laser power required. The minimum trace width commonly used is around 8 mils, with vias presenting additional complications due to size and spacing rules that can affect layout efficiency. Techniques such as UV and X-ray lithography are employed for fine circuitry fabrication, with a focus on managing the trade-offs between size, resistance, and manufacturing costs. Overall, while smaller circuitry can be desirable, practical limitations and production costs often dictate the achievable sizes.
CFlower
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Hi there,

I'll try my best to be descriptive. I'm looking for as much information as possible on the limits on current technologies in producing copper circuitry. I had a nice conversation the other day with a member of my research group and he was telling me about the demand for the ability to 3D print copper. He was saying as it stands it requires laser power beyond what is readily available. Now I'm not an electrical engineer by trade but I had a few ideas of things that might be fun for me to test regarding that. However, the size regime would be very small.

Some starting questions I suppose that would help me think are:

What are the current lower limits (speaking about size and current limitations I suppose) on copper circuitry? Is there a reason why we don't make things smaller than we do, or is smaller printed circuitry desirable?

What techniques are currently employed for making very small circuitry? I've read up on PCB fabrication techniques and what not but haven't found all the information I'm looking for.

If anyone could point me in the right direction to learn about the current state of very small scale circuitry production I'd be very grateful.

Thanks for your help,
CFlower
 
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Unfortunately your question is quite general.
You can get just about anything photo sensitised, then metal deposited or etched.
You get what you pay for, the best will be very expensive.
The chips that are mounted on the PCB have thin internal wires, PCB tracks do not need to be thicker.
Smaller chips are harder to place. Thicker tracks take more power to drive.
The surface tension of solder paste might have something to do with setting the lower size limit.

CFlower said:
What techniques are currently employed for making very small circuitry? I've read up on PCB fabrication techniques and what not but haven't found all the information I'm looking for.
How do you know that you have not found it all? How do we know what you have found? or what you want?
You cannot really expect us to spoon feed you with a complete brain load of everything.

Maybe you could find a PCB manufacturers website. It will specify their fabrication limits.
That will give you a realistic estimate of the relationship between capability and cost.
 
Smaller printed circuitry is not necessarily desirable. Real metal has real resistance so you don't want the traces to be too small. The minimum trace width that I've worked with was 8 mils (0.2032 millimeter). That's pretty small.

In my limited experience with PCB layouts I found that the main problem was the vias. Vias are tubes of copper that connect one layer to another. They are made by drilling a hole through the board then electroplating the hole.

There are number of design rules for vias that can complicate things. Vias have a minimum width because there is a smallest drill bit size in the process and you need some copper around the hole to connect traces for each layer. Vias must also have a minimum spacing to other adjacent copper on each layer. That spacing is typically larger than the minimum spacing between traces.

When you're laying out the PCB you might have some traces running neatly in parallel at the minimum trace spacing. As soon as you need a via to connect one of those traces to another layer you will have to redirect all the neighboring traces around the new via to give it more room. This can turn neatly spaced traces into a tangled mess.

I think the reason for the via rule is that the electroplating process can blur the via into another trace if it's too close. That would create an unintentional connection. The drill bit can't be too small either. The electroplating process requires a conductive liquid inside the via hole to deposit copper. If the hole is too small the liquid may not get in.

It would be nice if vias were solid copper instead of electroplated holes. It would greatly help the layout. Also, vias made with electroplated holes introduce stray capacitance and inductance. That can put a limit on bandwidth for a given trace. The basic rule right now is to limit vias as much as possible. They can even cost you some money. Some fab houses will charge you more if you have too many vias because it takes too much drilling and slows their factory down.
 
I am not going to go into much detail due to the vagueness of the first post, but in my department we make use of UV lithography for fabrication of our circuits. We have utilized X-ray lithography when we desired a higher aspect ratio (such as in a microstrip coupler), but it is typically UV-based. I have personally had portions of circuitry at approximately 100 micron width; but not very often and at microwave frequencies.
 
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