Quiescent output of a JFET amplifier

In summary, the conversation involves constructing a JFET amplifier using Pspice to compare the quiescent output with calculated values. The speaker is struggling with the simulation results not matching their calculations and is seeking guidance. They mention using the equations ID = IDSS(1-ID/VP)2, IDSS = 10, VP = 3, and VGS = -IDRS. The speaker also shares their attempt at a solution and notes that the 2N3819 is not completely in saturation mode at a gate voltage of 6V, suggesting a need to operate at a lower gate voltage for simplified current equations to work. They also mention the need for clarification on the gate voltage and the components of Vgs.
  • #1
Callum Plunkett
27
8

Homework Statement


I am to construct a JFET amplifier with Pspice (SIMetrix) to determine the quiescent output and to compare it with my own calculations. However my calculations don’t match the simulated output by quite a margin. Can anyone point me in the right direction as I’ve had very little feedback from the uni. Electronics is really (evidently) not my strong point and its the first time I've used Pspice.

Homework Equations


ID = IDSS(1-ID/VP)2
IDSS = 10
VP = 3

VGS = -IDRS

The Attempt at a Solution



ID = 6.86mA
VGS = 1.024V

upload_2019-3-9_2-1-34.png

from the simulation:
ID = 3.9189ma
VGS = 6.12165V
 

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  • #2
The 2N3819 is not completely in saturation mode at gate voltage 6V. Therefore, channel current will be reduced. You need to operate at lower gate voltage (4V or such) for simplified current equation to work
 
  • #3
It's not clear what the gate voltage is. What are the ac and dc components of Vgs?
 

1. What is a quiescent output of a JFET amplifier?

The quiescent output of a JFET amplifier refers to the output voltage or current that is present at the output terminal when there is no input signal present. It is also known as the DC output or the bias point of the amplifier.

2. Why is the quiescent output important in a JFET amplifier?

The quiescent output is important because it determines the operating point of the amplifier, which affects its overall performance and stability. It also allows for proper biasing of the JFET, which is necessary for optimal amplification.

3. How is the quiescent output determined in a JFET amplifier?

The quiescent output is determined by the biasing circuit in the amplifier, which sets the voltage or current at the JFET's gate. This, in turn, determines the amount of current flowing through the JFET and the output voltage.

4. What factors can affect the quiescent output of a JFET amplifier?

The quiescent output can be affected by changes in temperature, variations in the power supply voltage, and component tolerances in the biasing circuit. It can also be affected by the choice of JFET used in the amplifier.

5. How can the quiescent output be adjusted in a JFET amplifier?

The quiescent output can be adjusted by changing the values of the resistors in the biasing circuit. This can be done manually by using potentiometers or automatically through a feedback loop. It is important to ensure that the quiescent output stays within the desired range to maintain proper amplifier operation.

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