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Shock Temperature

  1. Nov 24, 2006 #1
    I am looking for a material to use, namely Silicon Carbide, and it gives a "Thermal Shock Paramter - 167C"

    Obviously thermal shock is going to be failure when there is a rapid temperature change, but what does 167C mean? It's not a rate of cooling, just a temperature. I cant find anything on it in my book or in google. Im guessing it might be a value like a Hardness value set against a standard?

    http://www.ceradyne.com/Uploads/Silicon_Carbide_data_sheet_10-03.pdf [Broken]

    I tried to call them but there closed for the rest of the week.
    Last edited by a moderator: May 2, 2017
  2. jcsd
  3. Nov 24, 2006 #2


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    I'm not familiar with the subject but I've found a lecture by Steve Roberts (Oxford) that might be helpful:

    http://www-sgrgroup.materials.ox.ac.uk/lectures/ceramics.html [Broken]

    Take a look at "Handout 3: Crack growth and thermal shock", page 3.


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  4. Nov 24, 2006 #3


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    Are you looking for impact toughness? or fracture toughness? both of which change with temperature.

    Thermal gradients induce localize stress fields, with the hotter portions normally under compression, while the cooler areas are under tension.
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  5. Nov 24, 2006 #4
    I want to know what does this "thermal shock parameter" mean.

    This is for my Heat Transfer Project, I am making a test rig to simulate an Intel Chip to test spray cooling.

    If I suddenly turn on the spray cooling I might thermally shock the Silicon Carbide and destory it, so I want to know if I have to slowly turn on the spray cooling to replicate a qasi-equilirbium process to avoid thermal shock.
  6. Nov 24, 2006 #5


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    Thermal Shock Parameter = [Strength * (1-Poisson’s Ratio)] / (Elastic Modulus * Thermal Expansion Coeff.)
    from - http://ceradyne.com/uploads/SiN%20Industrial%20Insert.pdf [Broken]

    Also see page 14 of http://www.ecm.auckland.ac.nz/course/phys130/ceramics.pdf [Broken]

    It is apparently related to fracture toughness, but I could only find an abstract that mentioned that fact. I think the parameter may be discussed in Callister's book on materials, but I'll have to dig it up.
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  7. Nov 24, 2006 #6
    I saw that at the bottom, but it does not give me a 'feel' for what it really means.

    As of now, its just some equation that does not tell me anything in terms of what will happen when I spray cool my simulated chip surface.

    Hmm, I just saw this in your second link:

    Crap, that's not what I wanted to hear. I have a temperature distribution of 70C to 903C over a span of 0.5cm. This thing will shatter. I'm going to have to find a new material.
    Last edited: Nov 24, 2006
  8. Nov 24, 2006 #7


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    Is 903°C correct? In a chip? That's awfully hot.
  9. Nov 24, 2006 #8
    It's correct. The surface temperature of the chip is at 70C, which is the correct operating temperature.

    The temperature distribution results in the bottom surface of the chip to be 903C, but I dont care what the temperatures are at the bottom, that's not whats being simulated. But I do need to watch out for the bottom temperature because of (i) melting or (ii) thermal shock.

    Because of (ii), I cant use this material anymore. I need a resistivity of 1-10 ohm-cm. Im looking at matweb for materials right now, but most don't have the right combination of properties.

    This project is pushing the limits of current technology. We are putting 2000W through a 1cm^2 chip area. Very very difficult.

    :yuck: You have callisters book too. That book is a good paper weight. :rofl:
    Last edited: Nov 24, 2006
  10. Nov 24, 2006 #9
    Ah yes, I played around with the numbers and material selection and I think I got a number that will work. The temp diff is only 40C, and so shock is no longer an issue. But now the material is very VERY thin, on the order of 0.8mm thick. (but still silicon carbide)

  11. Nov 24, 2006 #10


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    This is crazy...903C!!

    If nothing else (melting the packaging, breaking stuff from differential thermal expansion, etc.) do you know how pathetically small electron mobilities in Si become at temperatures like that? Your chip will be at least several tens of times slower than it woulb be, close to room temperature.
  12. Nov 24, 2006 #11
    Cyrus....."fill in blank" is thy name!

    You don't know all the details yet! :biggrin:

    Don't worry, the chip is NOT at 903C. The Sillicon Carbide I was modeling the chip as, FOR THE SURFACE ONLY!!!!!!!!! Was at 70C. Due to internal heat generation and surface convection (h=400,000), the bottom temp would be at 903C. This is PERFECTLY FINE, because I AM NOT modeling the BOTTOM OF THE CHIP!

    Anywho, dont sweat it. I will give you all a post with all the details once im done with the project, as for now, I dont have the time to do all that, sorry.

    Just trust me, it DOES Work. :wink:

    Yes, based on that thermal shock parameter, it was a problem, but I have worked a way around it. (I think) I had to make the chip 0.8mm thick, but now the temperature differnce is only 40C. No more shock issues.
    Last edited: Nov 24, 2006
  13. Nov 24, 2006 #12
  14. Nov 25, 2006 #13
    Another question, anyone know of a material that I can use as an insulator? It has to be very thin, something I can spray on as a film on the order of nanmeters thick, if possible.
  15. Nov 25, 2006 #14
    Crap, anyone know of a thermal paste/grease that is good for temperatures in the range of 800C?
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