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Spice Lying?

  1. Feb 25, 2013 #1
    Hi,

    Here's a voltage-to-current converter circuit I simulated in OrCAD Spice. While the current is supposed to be constant through out the load, it does not seem the case with spice, when altering V or R.

    Thanks.
     

    Attached Files:

  2. jcsd
  3. Feb 25, 2013 #2
    What? OrCAD lying? Never.

    Haha. Jokes apart. Your voltage to current converter is having the loading effect.
     
  4. Feb 25, 2013 #3
    What's the loading effect?
     
  5. Feb 25, 2013 #4
    Sorry I was too fast to say it is loading effect. Actually in this case with OPAMP loading effect wont happen. Your output current should not change with R but it should change with V.

    Can you show me screenshot of the schematic or netlist?
     
  6. Feb 25, 2013 #5
    i = V/R so it changes with V or R, not R-load.
     
  7. Feb 25, 2013 #6
    Damnit. I was correct in the first place. It is loading effect.

    http://en.wikipedia.org/wiki/Voltage_divider#Loading_effect
     
  8. Feb 25, 2013 #7
    Which resistance are you talking about?
     
  9. Feb 25, 2013 #8
    The grounded R.
     
  10. Feb 25, 2013 #9
    The other resistor R(L) represents the load.
     
  11. Feb 25, 2013 #10
    Aha, you can say RL instead of writing R-load. Its easier to understand.

    Now, you have one concept wrong here. The RL you are referring to is not the load of the circuit. Its just a resistor connected to the output of the OPAMP to limit the current coming out of it. The actual load is R which is where the current is going to and reaching ground. That is where you connect your next stage of circuits. In other words, your next stage of circuit replaces where the R is.
     
  12. Feb 25, 2013 #11

    AlephZero

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    I think you misunderstood what the circuit is meant to do (and I'm also confused by the previous post!)

    If V and R are constant, it keeps the current through RL constant if RL changes. (The constant current = V/R.)

    If you change V or R, you get a different "constant" current through RL.
     
  13. Feb 25, 2013 #12
    When analyzing the circuit, the i = V/R is the current through RL, which is the load, and this current is apparently independent of the RL.
     
  14. Feb 25, 2013 #13
    Yes but that's not what SPICE is giving me, when I change RL, it changes the current.
     
  15. Feb 25, 2013 #14
    Did you check if you hit the rails (does the output voltage of the op amp reach the supply voltage)?
     
  16. Feb 25, 2013 #15
    Thanks for the hint! Adjusting the ohms to make sure the output voltage is less than the supply did the trick.
     
  17. Feb 26, 2013 #16
    Also, Rudinhoob, SPICE almost never lies. If you don't understand the output of a simulation the issue is most likely:

    1. You hooked up the circuit wrong. (this is almost always it)
    2. You don't understand the circuit.
    3. Your models are wrong.
    4. You set the accuracy or step-size wrong.

    Way, way down the list is SPICE is lying. I'm a professional at this stuff and I've only seen in ONE case where a simulator was making an error. And this was an accelerated matrix-solver, not a vanilla SPICE.

    Seriously, "SPICE is wrong" should be the LAST assumption you make.
     
  18. Feb 26, 2013 #17
    Yeah you are right carlgrace, I might be influenced by some analog epic, Bob Pease ;)
     
  19. Feb 26, 2013 #18
    Hahah that famous "What's all this SPICE stuff anyway?" article! :)

    That thing is so obsolete it isn't even funny.

    Although the photo of Bob throwing his PC off the roof of the National Semiconductor parking lot was pretty funny.

    I knew Bob (he passed away a couple of years ago) and he refuted that article years ago. He used SPICE. In fact, in a modern IC, breadboarding is MUCH more likely to lie to you than SPICE.
     
  20. Feb 27, 2013 #19
    That only makes sense. All analog legends might had fixed Tek. 547 using breadboard while eating pizza in MIT building 20 at 3 am. But they can never ignore the convenience and accuracy of SPICE program.
     
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