Value of Vout in PMOS Inverter?

AI Thread Summary
In the discussion, the focus is on deriving the output voltage (Vout) equation for a PMOS inverter, contrasting it with the NMOS inverter's equation, which is Vdd - id*rd. The key question raised is how the position of the resistor affects the output voltage calculation. It is clarified that with the resistor at the bottom in a PMOS configuration, the output voltage can be expressed as Vout = id * Rd when the output is logic HIGH. The conversation emphasizes the importance of understanding the circuit configuration and how it influences the Vout equation, particularly noting that the output voltage relates to the current through the resistor and the supply voltage.
jean28
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Hey guys. I am simply trying to derive the equation for Vout in a PMOS inverter (attached). I know that in an NMOS inverter (which has the resistor in top of the transistor instead of the bottom) the equation for Vout is:

Vdd - id*rd.

But how does the resistor being in the bottom change this behavior? Is it now Vcc - ground? (which would equal Vcc).

Thanks.
 

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It could also be Vout = id * Rd.
 
jean28 said:
It could also be Vout = id * Rd.
If by Rd you mean that external resistor, then that looks right for output logic HIGH.
 

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