Engineering 2 bit by 1 bit multiplier circuit

[kusiobache]

Homework Statement

What is the truth table for a 2 bit number multiplied by a 1 bit number? Also, draw the circuit (AKA, the logic gates that give you the truth table).

Homework Equations

Not really any relavent equations...

The Attempt at a Solution

so I made the truth table, it is

A(1) A(0) B(0) C(1) C(0)
0       0     0       0    0
0       0     1       0    0
0       1     0       0    0
0       1     1       0    1
1       0     0       0    0
1       0     1       1    0
1       1     0       0    0
1       1     1       1    1

And I believe it is correct.

However, I do not know how to go about figuring out the circuit. I think I am supposed to break the big truth table into smaller truth tables consisting of say A(1) B(0) C(1), A(0) B(0) C(1), A(1) B(0) C(0), A(0) b(0) C(0), but do I need all four of those? I'm guessing yes, but then, lastly, how do I know how to configure the logic gates in the circuit (I would get the logic gates by determining which logics gates would be needed for each of those smaller truth tables).

Thanks for any help.

EDIT: Also, the small truth table for A(1) B(0) C(0) contradicts itself for 0,1. Is that a hold there, or am I making a mistake? if It's a hold how would I represent it? Would I have to use two logic gates to create that hold?

Edit 2: Alright, I think I solved it, but can somebody confirm my work?
I ended up only needing two of those small truth tables (one for each output), and this is the circuit I ended up with. (those are both and gates). It matches the larger truth table, but it seems really simple...

 

[berkeman]

Homework Statement

What is the truth table for a 2 bit number multiplied by a 1 bit number? Also, draw the circuit (AKA, the logic gates that give you the truth table).

Homework Equations

Not really any relavent equations...

The Attempt at a Solution

so I made the truth table, it is

A(1) A(0) B(0) C(1) C(0)
0       0     0       0    0
0       0     1       0    0
0       1     0       0    0
0       1     1       0    1
1       0     0       0    0
1       0     1       1    0
1       1     0       0    0
1       1     1       1    1

And I believe it is correct.

However, I do not know how to go about figuring out the circuit. I think I am supposed to break the big truth table into smaller truth tables consisting of say A(1) B(0) C(1), A(0) B(0) C(1), A(1) B(0) C(0), A(0) b(0) C(0), but do I need all four of those? I'm guessing yes, but then, lastly, how do I know how to configure the logic gates in the circuit (I would get the logic gates by determining which logics gates would be needed for each of those smaller truth tables).

Thanks for any help.

EDIT: Also, the small truth table for A(1) B(0) C(0) contradicts itself for 0,1. Is that a hold there, or am I making a mistake? if It's a hold how would I represent it? Would I have to use two logic gates to create that hold?

Edit 2: Alright, I think I solved it, but can somebody confirm my work?
I ended up only needing two of those small truth tables (one for each output), and this is the circuit I ended up with. (those are both and gates). It matches the larger truth table, but it seems really simple...

Your truth table looks incorrect to me. It has A(0) and B(0) counting, instead of A(1) and A(0)...

 

[kusiobache]

Your truth table looks incorrect to me. It has A(0) and B(0) counting, instead of A(1) and A(0)...

what difference does that make? It's just a label? What do you mean by "counting", though? Perhaps that's why I'm wrong. I just thought I needed to do the first bit and second bit for A (so 2^1 and 2^0 since base 2), the first bit for B (2^0), and then first and second bits for C (2^1 and 2^0)

 

[berkeman]

what difference does that make? It's just a label? What do you mean by "counting", though? Perhaps that's why I'm wrong. I just thought I needed to do the first bit and second bit for A (so 2^1 and 2^0 since base 2), the first bit for B (2^0), and then first and second bits for C (2^1 and 2^0)

Ah, I see what you meant now. It was just confusing for me. I would have put the single bit as the first column, and then the two input bits as the 2nd and 3rd columns, and the output bits as the last two columns. But I guess that's just up to personal preference.

The reason that I would have put the single bit for the first column would have been to hilight the way that it is basically a gate for letting the 2-bit quantity through to the output. When it is a 1, the output is just the input, and when it is a 0, the outputs are zero.

The AND circuit that you have drawn accomplishes this function.

 

[kusiobache]

Ah, I see what you meant now. It was just confusing for me. I would have put the single bit as the first column, and then the two input bits as the 2nd and 3rd columns, and the output bits as the last two columns. But I guess that's just up to personal preference.

The reason that I would have put the single bit for the first column would have been to hilight the way that it is basically a gate for letting the 2-bit quantity through to the output. When it is a 1, the output is just the input, and when it is a 0, the outputs are zero.

The AND circuit that you have drawn accomplishes this function.

I admit, your way does make more sense. I'm used to being unorganized though lol.

Thank you for the help man.