Common Emitter Amplifier

  • Thread starter exis
  • Start date
  • #1
22
0
Can someone please explain to me with what reasoning RL and RC are taken to be in parallel when calculating Vo for any decrease/increase in IC (DC) due to isig (ac)

Thank you
 

Attachments

Answers and Replies

  • #2
1,762
59
In AC analysis there should be a very low impedance between ground and Vcc. Likewise Cc2 is assumed to be a short, thus RL and Rc are in parallel.
 

Related Threads on Common Emitter Amplifier

  • Last Post
Replies
2
Views
2K
  • Last Post
Replies
13
Views
806
  • Last Post
Replies
1
Views
1K
  • Last Post
2
Replies
25
Views
6K
Replies
17
Views
892
Replies
1
Views
2K
Replies
5
Views
869
Replies
2
Views
3K
  • Last Post
Replies
16
Views
890
Top