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Common Emitter Amplifier

  1. Mar 16, 2010 #1
    Can someone please explain to me with what reasoning RL and RC are taken to be in parallel when calculating Vo for any decrease/increase in IC (DC) due to isig (ac)

    Thank you

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  2. jcsd
  3. Mar 16, 2010 #2
    In AC analysis there should be a very low impedance between ground and Vcc. Likewise Cc2 is assumed to be a short, thus RL and Rc are in parallel.
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