How do I design a traffic light controller using a counter and clock?

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Discussion Overview

The discussion revolves around designing a traffic light controller for an intersection using a counter and clock. The focus is on creating a state machine that operates without external inputs, utilizing flip-flops and basic gates to manage the traffic light states for north-south (NS) and east-west (EW) directions.

Discussion Character

  • Technical explanation
  • Debate/contested
  • Mathematical reasoning

Main Points Raised

  • One participant outlines the requirements for the traffic light controller, specifying the timing for each light (5 clock cycles for Red, 1 for Yellow, and 4 for Green) and the need for 10 states.
  • Another participant suggests using a memory (ROM) to map inputs to outputs, proposing a sequential clocking through memory locations.
  • A participant counters that memory cannot be used, emphasizing the need to rely solely on flip-flops and basic gates for the design.
  • There is a mention of the necessity to design a state machine, with a reference to a step-by-step process for defining states and creating truth/transition tables.
  • Participants recommend researching Karnaugh maps as a potential tool for simplifying the logic involved in the design.
  • A participant expresses gratitude for the suggestions received and indicates progress in their understanding.

Areas of Agreement / Disagreement

Participants do not reach consensus on the use of memory in the design, with some advocating for its use while others insist on a design limited to flip-flops and gates. The discussion remains unresolved regarding the best approach to implement the traffic light controller.

Contextual Notes

Participants mention the need for a truth table and output tables, but there are indications of uncertainty regarding the relationships within these tables. The discussion reflects varying levels of familiarity with state machine design and related concepts.

Who May Find This Useful

Individuals interested in digital design, state machines, and traffic control systems may find this discussion beneficial, particularly those looking for insights into designing logic circuits without using memory components.

brad sue
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Hi,
I have some problem to design a traffic controller.
the traffic lights are placed at an intersection of two streets, one street running north-south (called NS) and another street running east-west (called EW).
there is 5 clock cycles for Red light, 1 clock cycle for Yellow light , and 4 clock cycles for Green light. EW light is Red when NS light is Yellow or Green. Similarly, NS light is Red when EW light is Yellow or Green.
I need to design the controller that is essentially a counter driven with a clock (without any other external input). I will need 10 states to design the circuit. The six outputs are R-EW, Y-EW, G-EW, R-NS, Y-NS, and G-NS

What I did is that I tried to design a modulo 10 counter (see attached file ). I form the truth table of the system.
A B C D | NS | EW |
0 0 0 0 | R | G |
0 0 0 1 | R | G |
0 0 1 0 | R | G |
0 0 1 1 | R | G |
0 1 0 0 | R | Y |
0 1 0 1 | G | R |
0 1 1 0 | G | R |
0 1 1 1 | G | R |
1 0 0 0 | G | R |
1 0 0 1 | Y | R |

Then I tried the output tables, but I does resemble to anything I don't have the relationship of the table.
please can you help me ?
thank you
B.
 

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Engineering news on Phys.org
Normal solution would be to use a memory (ROM)
Treat each possible setup as a location in memory, set the value of the memory so that the output lines are the correct state for each switch.
Then clock through the memory in sequence outputing these values.

You can always think of a memory as mapping a particlular set of inputs (the address lines) onto a particular set of outputs (the data lines)
 
Hi mgb_phys,

we cannot use memory, only any kind of flip-flop and basic gates.
B
 
brad sue said:
Hi mgb_phys,

we cannot use memory, only any kind of flip-flop and basic gates.
B

You are designing a state machine. Have you learned how to do that yet? There is a step-by-step process to define the states, figure out how many FFs the state machine will require, and then write the truth/transition table and implement the logic.

http://en.wikipedia.org/wiki/State_machine


.
 
Also worth googling "Karnaugh map"
 
Thank you berkeman and mgb_phys,

I have looked at what you suggested me and I got some good things to work with!

B.
 
mgb_phys said:
Also worth googling "Karnaugh map"

Karnaugh Maps by member Kenneth Mann
https://www.physicsforums.com/showthread.php?t=100628

or search "Science Education" forum for threads containing Karnaugh
https://www.physicsforums.com/forumdisplay.php?f=35
 
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