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How to make a NAND gate?

  1. Sep 5, 2011 #1
    If an AND gate is basically two switches in series, and an OR gate is two switches in parallel, how would you physicaly make a NAND/NOT/NOR gate? What is physically going on in the microchip which has these gates?
     
  2. jcsd
  3. Sep 5, 2011 #2
    A term such as "AND gate" indicates a Boolean function, and not does not specify a way of implementing that function.

    A common technique used to implement logic gates in microchips is called "complementary metal oxide semiconductor," or CMOS.

    I found some links. More information may be found in electronics textbooks.
    http://thalia.spec.gmu.edu/~pparis/classes/notes_101/node103.html" [Broken]
    http://thalia.spec.gmu.edu/~pparis/classes/notes_101/node105.html" [Broken]
     
    Last edited by a moderator: May 5, 2017
  4. Sep 6, 2011 #3

    vk6kro

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    These functions can be implemented with discrete components, but chips containing four or more gates are available cheaply, so you would probably not bother these days.

    However, it is instructive to see how they work:
    280px-DTL_NAND_Gate.svg.png

    This is a NAND gate. Both inputs (at left) have to be high for the output to be low.

    If you reversed both diodes and omitted R1, you would have a NOR gate. If either input was high, the transistor would turn on and the output would be low.

    If you removed both diodes and R1, and fed the input to the left of R3, you would have an inverter, or NOT gate.
     
  5. Sep 6, 2011 #4
    so that diagram is esentially what makes up computers?
    so on any microchip, it has millions of miniature versions of that circuit to make up all other gates/flip flops/registers etc?
     
  6. Sep 6, 2011 #5
    Most current CPUs use a different sorts transistor called MOS. You might look up CMOS inverter for an idea.
     
  7. Sep 6, 2011 #6

    MATLABdude

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    No. Just because it IS possible to implement any combinatorial (and some state machine) circuits using just NANDs / NORs does not mean that it necessary to do so (for reasons of power efficiency and speed), nor is it done using the circuit that vv6kro presented. As an FYI, that's something called DTL, diode-transistor logic, which predated TTL and CMOS:
    http://en.wikipedia.org/wiki/Logic_family#DTL

    However, many PLDs (Programmable Logic Devices) are implemented using arrays of NANDs and NORs. Their primary purpose, however, is to allow for rapid reconfigurability and prototyping, rather than for blazing speed and efficiency:
    http://en.wikipedia.org/wiki/Programmable_logic_device

    As for microprocessors and microcontrollers, they're usually streamlined as well, because high power efficiency and performance (generally, less transistors between input and output) is highly desirable. As Phrak mentions, any logic circuits are also usually done in CMOS, rather than in something like DTL.
     
  8. Sep 6, 2011 #7

    vk6kro

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    A circuit like that might be used for a security system where you might use it to detect that all windows in a house were closed, for example.

    That was a version of a NAND gate that would be easy to understand. Later versions, like CMOS, are much more efficient and generate less heat.

    Computer CPU chips are usually proprietry so the maker doesn't even publish the exact internal details.
    However, here is a 4 bit adder to give you some idea of the complexity involved:
    images?q=tbn:ANd9GcSjNspKOshGwEQeS99SOD53maSzsWLvx36CPvPrYt4-DQpvwaj-.png

    A CPU chip would have thousands of circuits like that in it, and each would have specific purposes.

    They also have lot of memory areas called registers, which just hold a number for a fraction of a second while something else happens.
     
  9. Sep 6, 2011 #8
    When you say the input/output would be high or low, do you mean that 'high' would just be a voltage > 0, and 'low' would just be 0 volts?
     
  10. Sep 6, 2011 #9

    vk6kro

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    "HIGH" and "LOW" depend on the circuit.

    In the NAND gate given above, HIGH is something like V+ (maybe 5 to 10 volts) and LOW is something like the saturation voltage of the transistor, so maybe 0.5 volts. This is the voltage across the transistor (from collector to emitter) when it is fully turned on and nearly all the supply voltage is being dropped across the load resistor R2.

    In "proper" gates, these terms are strictly defined. So, a "LOW" might be between zero and 1 volt and a "HIGH" might be anything between 4 volts and 5 volts.
    This is necessary because these gates have to drive each other and the output of one gate has to be suitable for driving another gate of the same family of logic.
     
  11. Sep 7, 2011 #10
    If I wanted to make that NAND gate, how would I know what values of diodes/resistors/transistors etc to use?
     
  12. Sep 7, 2011 #11

    vk6kro

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    This circuit would work as shown with suitable resistors. However, it shows a negative supply (V-) which is inconvenient.

    To avoid using a negative supply, you would need to place a diode in the line between the emitter of the transistor and ground. It would have its anode connected to the emitter and its cathode connected to ground.

    You would also need to remove resistor R4.

    After that, make all the resistors 10K and all three diodes 1N4148s or any other silicon diode.
    The transistor could be a 2N2222 which seems to be readily available. Any power supply of 5 to 12 volts should work OK.

    If you just want a NAND gate, you could use a 74HC00 which has 4 of them in it. This one has to have a 5 volt power supply, though.
     
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