Understanding CMOS Gate States: Shoot-Through and Capacitance Effects

AI Thread Summary
The discussion focuses on the behavior of CMOS gate states, particularly during transitions between logical states. When input values change slowly, states such as Z or crowbarred can occur, influenced by threshold voltages. The crowbarred state, also known as "shoot-through," leads to power dissipation and supply bounce during logic transitions. This shoot-through effect can vary in significance based on the threshold and supply voltages, especially when both devices are on simultaneously. Additionally, the charging and discharging of gate and net capacitances are highlighted as major contributors to CMOS current consumption.
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Please help me with the question in the picture about pull-up and pull-down networks.

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If your networks are replaced with single FET's, then, in general, yes, for steady state 1 or 0 input values.

Even then though, when the input is (slowly) transitioning between 0 and 1 you can get other states (Z or crowbarred), depending on the threshold voltages.
 
Thank you. That was a bit confusing.
 
Also, you always get a crowbarred state for a short time when a logic gate is transitioning between logical states. That is where the power dissipation of CMOS comes from. It is also the source of supply bounce.
 
The short "crowbar" state during logic transitions is referred to as "shoot-through" and is only one source of CMOS current consumption and supply bounce. Another is the charging and discharging of gate and net capacitances. The Shoot-through portion of CMOS current can be very small or very significant depending on threshold and supply voltages. To the extent that the supply and thresholds are such that both devices can be on at the same time, shoot-through will be significant. But the charging and discharging on gate and net capacitances is generally a major contributer.
 
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