Physicsline Exam Q3: Transistor Output - Debating Correct Answer

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The question being referred to is question 3 on page 8:
http://www.itute.com/physicsline/phys_trial_exam1_2008v2.pdf

Answer referred to is Question 3 Area of Study 2:
http://www.itute.com/physicsline/phys_trial_exam1_2008v2sol.pdf

I don't understand why they get this answer. The answer I am getting is the exact same as them except shifted 3V down. This is because the DC part (given from the voltage divider) gives a middle point of 3V and when this is removed by capacitor 2, it will cause the voltage to be -3V? Can someone please explain why i am wrong and if not, why this answer is correct? Any help is appreciated...
 
on Phys.org
The output capacitor will remove the DC part of the output signal. If the signal is 0 there is no DC part and the capacitor won't remove anything.
 
Okay, so before it enters the final capacitor, would the graph look like a simple straight line, due to clipping. Since this straight line is infact a DC voltage (it doesn't vary) due to the clipping, it is removed by the capacitor and as such, the V out is zero. Is that right?
 

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