Are My Nets Aligned with Pins in PSpice(9.1) Netlist Error?

[jubayer ahmed]

TL;DR Summary

whenever i tried to simulate the circuit . PSpice keep showing me this ...How can i fix this?

 

[phyzguy]

Hmmm. Is there an error log somewhere telling you what the ERC error is? What frequency is V1? Do you get the error for all frequencies? Also, what if you increase the value of R1 to add more dissipation? Does that help?

 

[Baluncore]

Welcome to PF.
I am an LTspice user, not a Pspice user.

What type of simulation?
Apart from the ground reference, there are only two nodes in the circuit.
The capacitor is connected directly across an AC voltage source.

What is the Earth symbol ? AGND or GND, it must be node 0.

Start with a minimum system, a voltage source with a resistive load. Get that working.
Then add and test the inductor, then the capacitor.

Avoid units on values. Or one day you will define a 1 farad capacitor as having a value of 1F, then it will take another day to find it has a value of 1 femtofarad.

 

[phyzguy]

The capacitor is connected directly across an AC voltage source.

@Baluncore may have highlighted the problem here. Try putting a small resistor in series with the capacitor.

 

[berkeman]

Agreed, the cap across the AC source is what stood out to me as well.

 

[LvW]

I do not think that the capacitor is the problem.
My simulation programs (TOPSPICE, PSPICE) do accept such a simple circuit.
Each node must have a dc connection to ground - this seems to be fulfilled.

 

[Baluncore]

The capacitor should not be the problem, but the lack of a load, or an impedance in series with the cap, suggests that the circuit topology is unusual.
The circuit needs to be minimised to the point where it works, or a known good example circuit needs to be gradually edited and tested until it becomes the new circuit. That should identify the step that causes the problem.

 

[LvW]

I only can repeat that my simulators accept the circuit as it is.
Question: What about the connection between R1 and L1 ?

 

[berkeman]

I only can repeat that my simulators accept the circuit as it is.

Does your AC voltage source element include an output resistance?

 

[LvW]

No - it is an ideal ac source.

 

[berkeman]

Summary:: whenever i tried to simulate the circuit . PSpice keep showing me this ...How can i fix this?

Can you get more information about the error? From the PSpice User's Manual:

https://www.seas.upenn.edu/~jan/spice/PSpice_UserguideOrCAD.pdf

 

[eq1]

Summary:: whenever i tried to simulate the circuit . PSpice keep showing me this ...How can i fix this?

Hi Jubayer, It's a bit hard to tell but I think the nets are not aligned with the pins on the schematic you drew so the pins are not actually touching the wires. This is a common problem in EE CAD tools when the parts and the schematic are on different grid spacings. Here is how you check: pspice has a way to export the netlist. I think when you view the netlist you'll find that none of the nets are closed, basically all your parts are unconnected. If that's the case then you'll want to change the grid in the primary window to match whatever grid was used in the symbols.

 

[berkeman]

I think the nets are not aligned with the pins on the schematic you drew so the pins are not actually touching the wires.

That seems more likely now than the AC source driving the capacitor. I just ran a quick test in Micro-Cap and it also does not have a problem directly driving a capacitor.