Engineering Why Does My CMOS Circuit Fail to Pull Up?

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The discussion centers on a CMOS circuit that fails to pull up properly. The user expresses confusion over their step down and step up diagram, noting discrepancies with expected outcomes. Responses indicate that the circuit lacks a mechanism for pulling the output high, as it only pulls down through NMOS transistors without adequate PMOS support. It is suggested to study simpler CMOS circuits, such as inverters and NAND gates, to grasp the fundamental operation better. Understanding the role of both NMOS and PMOS transistors is crucial for effective circuit design.
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Homework Statement
Construct a CMOS circuit from (A'+B.C)'
Relevant Equations
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As attached below, I have drawn the step down and up diagram. However comparing to the answer, it seems to be way too off. Any idea why?

1587712459743.png

Answer:
1587712489224.png

Is there something wrong with my step down/step up circuit?
 
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How does your output ever pull up?
 
phyzguy said:
How does your output ever pull up?
Hi there, I'm not sure what you are specifying about as I am pretty new to this. I watched this video and learned from him though:
He stated that for pull-down, I should just simply draw the equation out without the inverse, which is what I have done
 
The point is that the output has to be able to pull up (high) and be able to pull down (low). Look at the correct answer. The output pulls down through the NMOS transistors, and pulls up through the PMOS transistors (the ones with the circles). In your circuit, there is nothing to pull the output up. Try studying some simpler CMOS circuits - inverters, NAND gates, NOR gates, and try to understand how they work.
 
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