How to design an XOR with these gates?

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Designing an XOR gate using 2 NAND gates, 1 NOR gate, and 3 inverters is feasible. The XOR function can be expressed as (A OR B) AND ~(A AND B). By utilizing the properties of NOR and NAND gates, the required gates can be arranged to achieve the XOR output. The key is to correctly apply the logic of negation and combination of the gates. This method effectively utilizes the specified gates to construct the desired XOR functionality.
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I need to design an XOR with 2 NANDS, 1 NOR, and 3 inverters. Is it possible? I can't seem to find how to do it now.
 
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Consider that the XOR of A and B can be written as:
(A OR B) AND ~(A AND B)

And recall that NOR is ~(OR) and that NAND is ~(AND) (NOT OR and NOT AND)

And that ~(~(A)) is just A

Then you can use up that exact quantity and type of gate!
 
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