(a) Remove all the internal bubbles in the circuit by applying DeMorgan's theorem so that the circuit consists of only AND gates and OR gates, and INVERTERS. INVERTERS can only be used for the inversion of inputs. Note that there is a 3-input NAND gate shared by both F1 and F3.
(b) Redraw your circuit using the given gates. They consist of four 3-input AND gates, four 2-input AND gates, four 3-input OR gates, and four 2-input OR gates. Draw your circuit in the bottom half of the schematic template.
Minimize the number of gates in your circuit by removing duplicate gates. Minimization by Boolean algebra is not required.
Use G1, G2, G3, G4, G5, and G6 as the outputs of your circuit. If your circuit is correct, the value of G1 should be the same as Fi for i = 1 to 6
The Attempt at a Solution
Here is the original circuit and my redrawn circuit down below. I am one 2-input AND gate over and I can't figure out how to eliminate one more.
My circuit is logically equivalent to the first but uses too many 2-input AND gates.
Can someone please help?