# CMOS Regions of Operation Problem

1. Mar 7, 2013

### tsaitea

In the attached photo, I found M2 to be triode region b/c the drain and drain source voltage is 0 which will always be less than the output voltage.

However, I am have troubles finding M1's region of operation, VDS >= VGS - VTH.
Vout - Vbias >= Vdd - Vbias - VTH **Vbias = 0.8 V , VTH = 0.5 V.

Vout >= Vdd - VTH

Im at this point now b/c Vout may vary.

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2. Mar 8, 2013

### CWatters

For the moment assume Vin(t) = 0.

For the Fet to be on the gate voltage must be more than Vth below the source. In other words Vbias > Vdd+Vth.

3. Mar 8, 2013

### rude man

You have not stated your problem.

M2 has no effect whatsoever on the output voltage unless the gate breakdown voltages are exceeded.

4. Mar 8, 2013

### tsaitea

So assuming Vin = 0, for the FET to be on VGS > VTH.

Where VG = VDD and VS = Vbias therefore,

VDD - Vbias > VTH

Vbias < VDD-VTH

I dont quite see where you got Vbias > Vdd + Vth from

5. Mar 8, 2013

### tsaitea

Right so for M2 Vout > Vth ,

For triode,

VDS2 < VGS2 - Vth
0 < Vout - Vth and since Vout > Vth,
M2 will be in triode.

6. Mar 9, 2013

### CWatters

M1 is a P type FET. So if I remember correctly the gate (VDD) has to be below the drain/source for it to be ON. Therefore Vbias must be > Gate + Vth.

M2 appears to be configured as a capacitor.

7. Mar 9, 2013

### rude man

I don't think so. It's an N type.

The more conventional symbol for an N type is an arrow pointing into the substrate, but the alternative symbol is the source pointing away from the device, with no subtrate indicated.
.

8. Mar 10, 2013

### CWatters

Darn it you are right. I should have looked more carefully.

9. Mar 10, 2013

### rude man

Well, without actual values for the bias and ac inputs the whole business is unsolvable anyway ...