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CMOS Regions of Operation Problem

  1. Mar 7, 2013 #1
    In the attached photo, I found M2 to be triode region b/c the drain and drain source voltage is 0 which will always be less than the output voltage.

    However, I am have troubles finding M1's region of operation, VDS >= VGS - VTH.
    Vout - Vbias >= Vdd - Vbias - VTH **Vbias = 0.8 V , VTH = 0.5 V.

    Vout >= Vdd - VTH

    Im at this point now b/c Vout may vary.
     

    Attached Files:

  2. jcsd
  3. Mar 8, 2013 #2

    CWatters

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    For the moment assume Vin(t) = 0.

    For the Fet to be on the gate voltage must be more than Vth below the source. In other words Vbias > Vdd+Vth.
     
  4. Mar 8, 2013 #3

    rude man

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    You have not stated your problem.

    M2 has no effect whatsoever on the output voltage unless the gate breakdown voltages are exceeded.
     
  5. Mar 8, 2013 #4
    So assuming Vin = 0, for the FET to be on VGS > VTH.

    Where VG = VDD and VS = Vbias therefore,

    VDD - Vbias > VTH

    Vbias < VDD-VTH

    I dont quite see where you got Vbias > Vdd + Vth from :confused:
     
  6. Mar 8, 2013 #5
    Right so for M2 Vout > Vth ,

    For triode,

    VDS2 < VGS2 - Vth
    0 < Vout - Vth and since Vout > Vth,
    M2 will be in triode.
     
  7. Mar 9, 2013 #6

    CWatters

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    M1 is a P type FET. So if I remember correctly the gate (VDD) has to be below the drain/source for it to be ON. Therefore Vbias must be > Gate + Vth.

    M2 appears to be configured as a capacitor.
     
  8. Mar 9, 2013 #7

    rude man

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    I don't think so. It's an N type.

    The more conventional symbol for an N type is an arrow pointing into the substrate, but the alternative symbol is the source pointing away from the device, with no subtrate indicated.
    .
     
  9. Mar 10, 2013 #8

    CWatters

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    Darn it you are right. I should have looked more carefully.
     
  10. Mar 10, 2013 #9

    rude man

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    Well, without actual values for the bias and ac inputs the whole business is unsolvable anyway ...
     
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