Design a 2 to 4 Decoder using 4 to 16 Decoder

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To design a 2 to 4 decoder using a 4 to 16 decoder, a correct truth table is essential. The initial truth table presented was incomplete, lacking output associations for each input state. Clarification is needed on whether A is the high or low bit, as this affects the output configuration. Several 4 to 16 decoder datasheets, such as the one from Texas Instruments, provide insight into input labeling, indicating that A is typically the least significant bit. A properly structured truth table will reflect the correct outputs based on the specified inputs.
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Homework Statement


How to design a 2 to 4 Decoder using 4 to 16 Decoder ?

Homework Equations


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The Attempt at a Solution


Capture.png

Truth Table :
A B
0 0
0 1
1 0
1 1 ( O3)
Is my answer correct ?
 

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Do you have the datasheet for this device? Is A the high bit, or low bit? The way you show your truth table, it looks like A is the High bit.
Where do you want to read the 4 outputs? From Q(0) through Q(3)?

My initial observation is: your truth table is incorrect, because it only show inputs (A and B). You do not show what outputs are associated with these states.
 
A B - OP
0 0 - O0
0 1 - O1
1 0 - O2
1 1 - O3
 
scottdave said:
Do you have the datasheet for this device?
No.
scottdave said:
From Q(0) through Q(3)?
Yes.
 
There are several manufactured 4 to 16 decoders, like this one for example http://www.ti.com/lit/ds/symlink/cd74hc4515.pdf
Note the inputs on that one (and several that I searched) are labeled A0 (least significant) to A3 (most significant bit). This leads me to "guess" that A in yours is least significant, then B, then ( C & D , which are grounded so they are fixed to zero). How would a truth table look like in that situation?
 

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