How Can I Prevent False Triggering in My Relay Circuit?

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The discussion centers on preventing false triggering in a relay circuit using a CMOS IC 4017. The user experiences issues with false triggering when using a relay, while an LED works correctly, suggesting power supply instability. Suggestions include adding capacitors for decoupling, using diodes across the relay coil to mitigate voltage spikes, and employing a resistor to reduce sensitivity to interference. Additional recommendations involve isolating the logic supply from the relay load and ensuring proper grounding and filtering. Implementing these modifications is expected to stabilize the circuit and prevent false triggering.
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I was creating a touch switch using CMOS IC 4017. The input pin is 14 and the output pins are 3 and 2. When pulses are given to the input, the IC makes the outputs high alternatively. Thus if a pulse make the pin 3 high the next pulse make pin 2 high. From the diagram it can be seen when pin 3 is high, it drives a relay to switch up something, but by next pulse the switch is down. The problem is, when I use relay it creates false triggering to the ic. If I use LED in the place of relay it works fine. I am including the part of the diagram.
[PLAIN]http://a3.sphotos.ak.fbcdn.net/hphotos-ak-snc6/190693_10150117698707402_804672401_6381121_2022807_n.jpg
Can anyone help me please. How can I stop the false triggering. I think using capacitors can solve the problem, but I don't know how to use them properly.
Thanks.
 
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Imteaz Ahmed said:
I was creating a touch switch using CMOS IC 4017. The input pin is 14 and the output pins are 3 and 2. When pulses are given to the input, the IC makes the outputs high alternatively. Thus if a pulse make the pin 3 high the next pulse make pin 2 high. From the diagram it can be seen when pin 3 is high, it drives a relay to switch up something, but by next pulse the switch is down. The problem is, when I use relay it creates false triggering to the ic. If I use LED in the place of relay it works fine. I am including the part of the diagram.
[PLAIN]http://a3.sphotos.ak.fbcdn.net/hphotos-ak-snc6/190693_10150117698707402_804672401_6381121_2022807_n.jpg
Can anyone help me please. How can I stop the false triggering. I think using capacitors can solve the problem, but I don't know how to use them properly.
Thanks.

Can you monitor the voltage supply with an oscilloscope to see how much it is glitching? How much current does the relay coil draw, as compared to your LED experiment?

If it is your power supply drooping, you need more capacitance on the power supply traces. How much capacitance do you have now? What is your power supply? (Linear, switcher, how much current capability, what is the current limit set to, etc.)
 
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The 4017 has 10 outputs which it brings high in sequence.

So, you may get pins 2 or 3 going high or you may get some other pin going high. In fact while you hold on to the clock pin, random pickup will feed rapid pulses into the clock pin and cause all the outputs to go high in turn.

That is also a very brutal way of clocking the counter. If you put a static charge on the input pin, it may take several minutes to discharge. Or, it may destroy the chip.

The relay driver transistors should have base resistors to limit the base current and the relays should have diodes across them to stop damaging the transistors from high voltage spikes.

So, the circuit has a way to go yet.
 
@ berkeman:
Thanks for your suggestions. I am going to check it out and try to filter my power supply better.
 
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vk6kro said:
The 4017 has 10 outputs which it brings high in sequence.

So, you may get pins 2 or 3 going high or you may get some other pin going high. In fact while you hold on to the clock pin, random pickup will feed rapid pulses into the clock pin and cause all the outputs to go high in turn.

That is also a very brutal way of clocking the counter. If you put a static charge on the input pin, it may take several minutes to discharge. Or, it may destroy the chip.

The relay driver transistors should have base resistors to limit the base current and the relays should have diodes across them to stop damaging the transistors from high voltage spikes.

So, the circuit has a way to go yet.

Yes, the IC has 10 outputs but I used only 2 by resetting the output after pin 2 for an on/off effect. Thanks for your tip about static charge. I should think more about this concern.

The relay driver transistor has a base resistor but I didn't mention it for simplicity and the relay has a diod parallel to it.
 
Where's your diode? Where's the capacitance across your IC?

Put a reverse biased signal diode across the relay coil. The inductance of the relay is trashing your supply voltage.

How are you decoupling the supply to your IC from signal noise? Put an 0.01 microfarad monolithic capacitor across the supply rails (pin 8 and pin 16) of your IC.

Come back if you have additional problems.
 
You could try a 3 terminal regulator (like a 7805) between the top of the relay and the power input of the 4017. This should help to reduce spikes on the power supply line from the relay coil.

Add a 0.1 uF capacitor to ground at the 4017 power pin 16 and a 470 uF capacitor to ground at the top of the relay.

A large resistor like 4.7 M from the clock pin 14 to ground may make it less sensitive to interference and the risk of static damage.
 
vk6kro said:
You could try a 3 terminal regulator (like a 7805) between the top of the relay and the power input of the 4017. This should help to reduce spikes on the power supply line from the relay coil.

Add a 0.1 uF capacitor to ground at the 4017 power pin 16 and a 470 uF capacitor to ground at the top of the relay.

A large resistor like 4.7 M from the clock pin 14 to ground may make it less sensitive to interference and the risk of static damage.

I hope your reply is the answer what I am seeking for. I will try your modification suggestions. I will reply if these modifications work or not. Thank you.
 
You need to be very careful with power wiring and decoupling when running inductive loads. I tend to use the raw supply to run the load and then isolate the logic supply regulator with a diode in-line to it's input filter capacitor. The diode prevents back current from the logic supply when the load causes a dip in the raw voltage.

You might get away with just separating the feeds (both + & -) to your load and logic and adding large and small filter/decoupling capacitors at the logic board.

Also you should put a 10 or 20 Meg resistor between your input and ground to provide a small amount of over-voltage-static protection and ensure that it is always in the OFF state when not touched. I've found that most CMOS 4000 series devices are fairly well protected these days, but a little extra doesn't hurt, and they do need to be held in a known state.
 
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