Dismiss Notice
Join Physics Forums Today!
The friendliest, high quality science and math community on the planet! Everyone who loves science is here!

Logic Gates (NAND to AND Gates)

  1. Dec 14, 2014 #1
    couldnt understand why the input is ( (XY)' (XY)' ) ' , IMO , it should be ((XY)' ) ' . because the 2nd logic gates receive (XY)' input from the first logic gates , and the second logic gates act as inverter for the first logic gates.
     

    Attached Files:

  2. jcsd
  3. Dec 14, 2014 #2

    jedishrfu

    Staff: Mentor

    I think they did that because the (XY)' is the input to the second gate and both inputs are tied together then they said (XY)'(XY)' and the second gates output is then ( (XY)' (XY)' ) ' which can be reduced to ( (XY)' ) ' and the double negative to simply XY so it shows that two NAND gates can be used to construct an AND gate.
     
  4. Dec 14, 2014 #3
    Can I say the input is ((XY)' ) ' , which is also can be reduced to XY ?
     
  5. Dec 15, 2014 #4

    jedishrfu

    Staff: Mentor

    Yes, I believe thats right.
     
Know someone interested in this topic? Share this thread via Reddit, Google+, Twitter, or Facebook




Similar Discussions: Logic Gates (NAND to AND Gates)
  1. Logic Gates (Replies: 2)

  2. Logic gates. (Replies: 6)

  3. Logic gates: NOT gate (Replies: 13)

Loading...