Monostable and Astable multivibrator using 555 timer.

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Discussion Overview

The discussion revolves around the operation and characteristics of monostable and astable multivibrators using the 555 timer. Participants explore concepts related to duty cycles, triggering voltages, and the timing mechanisms of these circuits, seeking clarification and understanding of their behavior in various configurations.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested
  • Homework-related

Main Points Raised

  • Some participants assert that the duty cycle of an astable multivibrator's output is always greater than 50%, citing the charging and discharging times of the timing capacitor.
  • Others challenge the necessity of a duty cycle greater than 70% for monostable multivibrators, questioning the validity of this requirement and expressing confusion over its implications.
  • One participant explains that the timing capacitor charges through both resistors in an astable configuration but discharges only through the lower resistor, leading to longer charging times than discharging times.
  • There is a discussion about the conditions under which a 50% duty cycle can be achieved, with some suggesting that it is only valid when R1 equals R2.
  • Participants discuss the triggering mechanism of monostable multivibrators, noting that a minimum voltage is required for reliable triggering and that the duty cycle concept may not apply in the same way as in astable configurations.
  • One participant provides examples with specific resistor and capacitor values to illustrate their points about duty cycles in different configurations.

Areas of Agreement / Disagreement

Participants express differing views on the duty cycle requirements for astable and monostable multivibrators, with no consensus reached on the necessity of a duty cycle greater than 70% for monostables. The discussion remains unresolved regarding the implications of duty cycle in these contexts.

Contextual Notes

Some participants note that the duty cycle is primarily applicable to repetitive waveforms, raising questions about its relevance in the context of monostable multivibrators, which may operate under different conditions.

shayaan_musta
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Hello experts!

I have given 2 question in exams.

1)Explain why duty cycle of Astable circuit's output is always greater than 50%?

2)In monostable multivibrator, how low does the triggering voltage have to go in order to initiate the output pulse and why duty cycle must be greater than 70%?

What could be the answers to these question. I have given exams. I just want to review my concept.

Here are two Astable schematics; One diode in which we get 50% duty cycle. And other without diode.
Here is also monostable schematic.

Thanks in advance.
 

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you should present your answers and why you think they are right, and if anyone notices an error, they will let you know.
 
The timing capacitor charges through both resistors, but only discharges through the lower one (into the 555's discharge pin, pin 7).

So, the charging always takes longer than the discharge and the output is always high for longer than it is low.

Adding a diode a shown in the second diagram would reduce the charging resistance and allow a faster charging time than discharging time.

The monostable comment is not true as far as I know. You could trigger a monostable for 1 second and then not touch it for an hour. This would give a very short duty cycle.
Duty cycle doesn't really apply for monostables.

The triggering input on a monostable is normally grounded for triggering. According to the data sheet for the 555, a minimum voltage of 0.33 volts is required for reliable triggering.
 
phinds said:
you should present your answers and why you think they are right, and if anyone notices an error, they will let you know.

Here are my answers.

1)TCharge=C1(R1+R2), hence charging is through both resistors. While Tdischarge=C1R2, hence discharging is through just R2. This implies clearly that charging is always greater than discharging.

2)In order to initiate pulse at output pin2 is below 1/3VCC then we get output high. But why its duty cycle must be greater than 70%, I don't know. But I want to know answer. Help please. thanks
 
vk6kro said:
The timing capacitor charges through both resistors, but only discharges through the lower one (into the 555's discharge pin, pin 7).

So, the charging always takes longer than the discharge and the output is always high for longer than it is low.

Adding a diode a shown in the second diagram would reduce the charging resistance and allow a faster charging time than discharging time.

Your answer is in the case if and only if R1=R2. Is it?
Because I have also given the same answer in exam as you did. And I think if R2>>R1 then we can get 50% duty cycle without any diode. Am I right?
If it is so then your and my answer is just true if R1=R2 is under consideration.

vk6kro said:
The monostable comment is not true as far as I know. You could trigger a monostable for 1 second and then not touch it for an hour. This would give a very short duty cycle.
Duty cycle doesn't really apply for monostables.

The triggering input on a monostable is normally grounded for triggering. According to the data sheet for the 555, a minimum voltage of 0.33 volts is required for reliable triggering.

Look at my answer which I have given at phinds objection. And help me by looking that. Thanks.
 
Your answer is in the case if and only if R1=R2. Is it?
Because I have also given the same answer in exam as you did. And I think if R2>>R1 then we can get 50% duty cycle without any diode. Am I right?
If it is so then your and my answer is just true if R1=R2 is under consideration.

No. Can you see that R1 + R2 has to be greater than R2? Assuming R1 is not zero ohms.
So, the time the output is high has to be greater than the time that it is low.


2)In order to initiate pulse at output pin2 is below 1/3VCC then we get output high. But why its duty cycle must be greater than 70%, I don't know. But I want to know answer. Help please. thanks
Duty cycle is the ratio of time that the output is high compared with the time that it is low.
There is no reason that this would be more or less than 70 %.
You could trigger a new pulse immediately after the old one has finished or you could wait a week before triggering a new pule.
 
vk6kro said:
No. Can you see that R1 + R2 has to be greater than R2? Assuming R1 is not zero ohms.
So, the time the output is high has to be greater than the time that it is low.
No. I mean to say that...
Let meets an example,
Let C1=0.01μF and R1=10k and R2=100k then Tcharge=1.1ms while Tdischarge=1ms
Now, let C1=0.01μF and R1=10k and R2=10k then Tcharge=0.2ms while Tdischarge=0.1ms
Now again, let C1=0.01μF and R1=100k and R2=10k then Tcharge=1.1ms while Tdischarge=0.1ms
Did I do all cases above correctly? If so then without diode in each case I get duty cycle must be greater than 50%. Am I right?

vk6kro said:
Duty cycle is the ratio of time that the output is high compared with the time that it is low.
There is no reason that this would be more or less than 70 %.
You could trigger a new pulse immediately after the old one has finished or you could wait a week before triggering a new pule.

In monostable is not necessary duty cycle is greater than 70%. Then why my teacher give me that question! Seems strange.
But idea of triggering is still not clear to me. Because charging is depend on discharging in monostable i.e. if capacitor discharges to 1/3Vcc then at that moment I have to given an another pulse to generate output pulse. Isn't it?
 
Yes, the duty cycle is always greater than 50%.

In monostable is not necessary duty cycle is greater than 70%. Then why my teacher give me that question! Seems strange.
But idea of triggering is still not clear to me. Because charging is depend on discharging in monostable i.e. if capacitor discharges to 1/3Vcc then at that moment I have to given an another pulse to generate output pulse. Isn't it?

You could ask your teacher that question. Maybe he means something else.
Duty cycle is really only applicable to a repetitive waveform, not to the random nature of a monostable.

The capacitor starts off uncharged because it has a conducting transistor across it and then the internal transistor on pin 7 switches off and the capacitor starts to charge via the series resistor. This takes time and during this time, the output is high.
When the capacitor charges to 0.66 * V+ then the output goes low again and the capacitor is discharged via the internal transistor.
 
Thanks for helping me friend.

Well I will surely ask my teacher. I she could give me any reason then I'll bring it to your knowledge so that you could increase your knowledge by doing private message to you.

Well thanks once again.
 

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