N-channel enhancement MOSFET Operation Equations

[shallrd]

Please help! I have done a lot of pouring over internet searches to try and understand the operation equations for a n type enhancement mode MOSFET for quite some time now. All textbooks limit equations for such devices to currents flowing from drain to source only. But I do know that current can flow from drain to source (reverse from convention). Can anyone help?

I am using this type of FET in a level shifting circuit for a I2C bus. This is a very common application I believe, but I can't find good details to explain the reverse current.

Here is a example circuit.

 

[eq1]

It looks like there is something wrong with the simulation you attached but in the I2C level shifter shown the current flows through the body diode in the FET when something on the R831 side of U1 wants the line low.

This app note explains the operation of the circuit you've drawn:
http://ics.nxp.com/support/documents/interface/pdf/an97055.pdf

 

[carlgrace]

The MOSFET is being used as a switch. When the "3.3_v_sensor" terminal goes low the MOSFET becomes a resistor. When the 3.3_v_sensor terminal is high the MOSFET is off.

For a typical symmetric MOSFET the drain and source are in fact defined by the direction of current flow. If the current flows the other direction source and drain are mixed.

Note in modern integrated circuits this isn't exactly true because they are doped differently to mitigate certain second-order effects but that isn't germane for you now.

 

[shallrd]

Thanks for both of the replies so far.

I looked through the application note that eq1 posted. I have already seen that info. I know how the circuit works. What I want to see is supporting equations that agree with the function. I have seen a lot of info for how to use a MOSFET like this as a analog switch but no theory to back it up.

carlgrace I know what you are saying is true... but, do you have any theory to back up the words? By theory I mean equations, important considerations, etc?

The #1 thing that is giving me discomfort with this circuit is that textbooks define saturation for a n enh MOSFET as this:
Vgs≥Vth & Vds≥Vgs-Vth

In the case where a 5V device pulls the line low Vgs will be greater than Vth once the body diode begins conducting. But the second condition will not be met because Vs is greater than Vd (i.e. current is flowing from source to drain, not from drain to source). I am confused why textbooks limit information for such a device to these constraints. As you said, carlgrace, Vs essentially becomes Vd in the mentioned condition... but where can I read such information? Information that describes the constrains of such a situation and potential pitfalls? Obviously we must satisfy Vth... also we must observe the power/temp ratings of the part, is there more to be concerned with?

 

[carlgrace]

Check out "Analog Integrated Circuit Design" by Johns and Martin, first edition.

In Chapter 1, p. 16-17 it says:

"The source terminal of an n-channel transistor is defined as whichever of the two terminals has a lower voltage."

Also in your schematic you're operating the n-channel device in the triode region where it becomes a voltage-controlled resistor. The equation you gave is for saturation.

 

[Jony130]

Almost all discrete MOSFET has build-in parasitic diode (body diode with anode on the source, cathode on the drain for N-channel). This diode act just like a Zener diode. The Zener action occurs when Vds > Vds_max. And act like a "normal" diode when Vsd > 0.6V.
So if voltage at source is about 0.6V higher than drain voltage, the body diode is forward bias and MOSFET gate has no influence on this diode forward current. That's the other reason you can't just swap the drain and source.
Only in JFET you can swap the drain and source. The body diode kill this effect in MOSFET.

 

[eq1]

shallrd,

It's a subtle point but on page 3 of the app note is this text which places a requirement on the U1 FET:

"Many MOS-FET’s have the substrate internally already connected with its source, otherwise it should be done externally. The diode between the drain (d) and substrate is inside the MOS-FET present as n-p junction of drain and substrate."

With this SB short connection one now models the U1 FET as a NFET, with Vsb=0V obviously, and a diode in parallel. The reverse current is now modeled as the diode forward current when Vsd<-Vf so you will not find a MOSFET equation which explains it. And once there is an If current in the body diode it will flow through R256 which will eventually create the necessary Vgs to turn on U1, assuming the pull down on U1's drain is sufficiently stronger than 3.3K.

For more on body diodes, and why they exist, see this link:
http://en.wikipedia.org/wiki/Power_MOSFET#Body_diode