# Digital Logic - Timing Analysis

What do they mean by saying that " If the clock frequency is 45MHz and we use 50MHz then the circuit will not work".

I am confused :uhh: I donot understand the timing analysis in digital logic.

-Thanks

dlgoff
Gold Member
http://en.wikipedia.org/wiki/Clock_signal" [Broken]

http://en.wikipedia.org/wiki/Digital_timing_diagram" [Broken]

Last edited by a moderator:
When J = K = 1, flipping the Clock signal should cause the flipflop to toggle, but because of the timing signal it won't.
To see how the circuit is actually supposed to work, set J = K = C = 1 then continuously click somewhere else on the board to witness the toggle action.

I hope this help. If you have more questions let me know.

Last edited by a moderator:
berkeman
Mentor
What do they mean by saying that " If the clock frequency is 45MHz and we use 50MHz then the circuit will not work".

I am confused :uhh: I donot understand the timing analysis in digital logic.

-Thanks

Here's an old app note that talks about memory timing:

http://search.echelon.com/cs.html?url=http%3A//www.echelon.com/support/documentation/bulletin/005-0013-01D.pdf&charset=iso-8859-1&qt=external&col=&n=1&la=en [Broken]

.

Last edited by a moderator:
vk6kro