Understanding Input Offset Voltage in Real-World Op Amps: A Guide

[earlofwessex]

hi

I've been set a project to test the limitations of the ideal op amp when applied to the real ones, and its doing my head in:grumpy:, if any of you could help me figure this one out i'd be very thankful.

the first thing I'm confused about is the input offset voltage:
i know its the voltage between the inputs, (caused by what?) causeing the output to saturate (+ or -) if both inputs are tied to GND without negative feedback.
it can be nullified in some chips (including the 741 which i am testing), but I'm "not alllowed" to do this, as the tests are for the circuits as given to me (standard non inverting/inverting/summing/differential/comparator).

so how do i measure it for a specific circuit? say the inverting one.

i can't just measure the V between terminals, since this will change with output due to the non-infinite open loop gain (can't measure that until i know the CMRR). i could adjust the input voltage until the output was 0v, but then the p.d. between inputs would still be altered by the input bias current and the resistor tolerances (R₃ =/= R₁||R₂)

and even if i could just ignore that, i still don't know how it changes with V_in, or why its there in the first place.
(since its polarity seems to be random, i'd guess its there as a semiconductor thing, like diodes forward bias voltage, which might suggest that it changes little with changing circuit conditions, but I've got no reference or basis for that)


thanks for your thoughts/comments

 

[dlgoff]

The input offset voltage is just the difference between V+input and V-input when the output is 0volts. Typically a few millivolts. You should be able to use two adjustable voltage sources and make the output 0 volts then find the input source difference.

Here is a list of http://en.wikipedia.org/wiki/Operational_amplifier#Limitations_of_real_op-amps"

 

[earlofwessex]

thanks,

isn't that assuming that there is no common mode gain? since the inputs won't be at 0v due to input current?

how could i test if the offset changes under different input voltages? or should i just assume that it doesn't?

 

[dlgoff]

isn't that assuming that there is no common mode gain? since the inputs won't be at 0v due to input current?

Since the idea op-amp would have no input current, these small input currents is what causes the offset in a real world op-amp.

how could i test if the offset changes under different input voltages? or should i just assume that it doesn't?

Can you think of a good way to check the dependence of input voltage difference/offset, when the output is zero, vs the input voltage?

 

[earlofwessex]

Since the idea op-amp would have no input current, these small input currents is what causes the offset in a real world op-amp.

so the voltage offset is a function of the mismatching of input bias current? or just caused by it? thanks for pointing that out, most web sites don't even say they're connected and i missed it on the first read through of the wiki article.

Can you think of a good way to check the dependence of input voltage difference/offset, when the output is zero, vs the input voltage?

so for a standard differential setup, I've got the CMMR (can't see how to get that for a single input circuit). this was done by tying both inputs to the same source and monitoring output.

Voffset should be found by connecting 2 supplies, setting one to a nominal voltage and the other so that Vout = 0v and measure the difference between inputs.
but! the output won't reflect just the offset, but also the common mode gain

and i can't correct for that since the CMRR measurement didn't account for the offset.

and in any case, i can't apply this to the inverting circuit, since one leg is tied to ground.

----------------------

what about if (inverting or non circuit) i measured the current through Rcomp, and compared it to the difference in current through R1 and R2, then all i would need to find is how the difference in input bias current affects the offset voltage. is it as simple as ohms law using the impedance between the inputs?

http://www.opamp-electronics.com/tutorials/images/semiconductor/03069.png

thanks

 

[Adjuster]

Regarding offsets, there are in fact two separate kinds:

1) The input offset voltage, i.e. the voltage needed between the two inputs to give zero voltage output. It is typically of the order of mV, but can be can be less depending on the op-amp in question. This voltage is due mainly to small differences between devices in the input differential amplifier. It is not due to the input offset current.

2) The input offset current, i.e. the difference between the two input bias currents. This is another issue: it is not the cause of the above. That said, it can indeed generate volt-drops in circuit resistances, creating an offset voltage at the input.

If you look at a datasheet for a real op-amp like the 741, you will find the two types of offset listed separately. .

 

[dlgoff]

Regarding offsets, there are in fact two separate kinds:

1) The input offset voltage, i.e. the voltage needed between the two inputs to give zero voltage output. It is typically of the order of mV, but can be can be less depending on the op-amp in question. This voltage is due mainly to small differences between devices in the input differential amplifier. It is not due to the input offset current.

2) The input offset current, i.e. the difference between the two input bias currents. This is another issue: it is not the cause of the above. That said, it can indeed generate volt-drops in circuit resistances, creating an offset voltage at the input.

If you look at a datasheet for a real op-amp like the 741, you will find the two types of offset listed separately. .

Thanks for bringing this up. Not only is there input offset current, due to biasing, there is a slight current difference between the two currents. However it is typically ten times less than the average of the two currents.

 

[dlgoff]

but! the output won't reflect just the offset, but also the common mode gain

and i can't correct for that since the CMRR measurement didn't account for the offset.

This is what the wiki page has to say:

First, due to the amplifier's high voltage gain, it virtually assures that the amplifier output will go into saturation if it is operated without negative feedback, even when the input terminals are wired together. Second, in a closed loop, negative feedback configuration, the input offset voltage is amplified along with the signal and this may pose a problem if high precision DC amplification is required or if the input signal is very small.