Why Is the Voltage on Both Capacitors 12 Volts in This Circuit?

AI Thread Summary
In the discussed circuit, both capacitors have a voltage of 12 volts at time t<0 because they have been charged to this level before the analysis begins. The presence of a resistor does not affect the voltage across the capacitors at this moment since there is no current flowing through the resistor, resulting in no voltage drop. The circuit has been in a steady state for a sufficient duration, allowing the current to decay to zero. Therefore, the voltage remains at 12 volts across both capacitors despite the resistor's presence. Understanding this concept is crucial for analyzing capacitor behavior in circuits.
nhrock3
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http://i48.tinypic.com/1o4ow9.jpg

why in this circuit they say that in t<0
the voltage on both capacitators is 12 volts??

if both points of each capacitators is connected to the voltage source directy
then 12 volts is ok.

but here we have a resistor between them
this resistor drops the original voltage
it cannot be 12
 
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nhrock3 said:
http://i48.tinypic.com/1o4ow9.jpg

why in this circuit they say that in t<0
the voltage on both capacitators is 12 volts??

if both points of each capacitators is connected to the voltage source directy
then 12 volts is ok.

but here we have a resistor between them
this resistor drops the original voltage
it cannot be 12

If there is no current through a resistor, what is the voltage drop?

The current through the resistors has decayed off to zero, if the circuit has been connected up like that for a long time before t=0. Make sense?
 
thanks :)
 
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