If gate (NMOS) is connected to Ground how is current able to flow

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Discussion Overview

The discussion revolves around the operation of an NMOS transistor when its gate is connected to ground. Participants explore the conditions under which current can flow in the circuit, particularly focusing on the gate voltage (Vg) and the drain-source voltage (Vds). The conversation includes technical explanations and clarifications regarding the circuit configuration and the behavior of the NMOS transistor.

Discussion Character

  • Technical explanation, Conceptual clarification, Debate/contested

Main Points Raised

  • One participant expresses confusion about how current can flow in an NMOS transistor when the gate is connected to ground, questioning the necessity of a positive gate voltage for channel formation.
  • Another participant suggests that the circuit symbol might be a PMOS instead of an NMOS, indicating a potential misunderstanding of the device type.
  • A different participant references a wiki page to clarify the symbol used in the circuit, noting that the arrow direction does not definitively indicate the type of MOSFET.
  • One suggestion is made to add 5 volts to all nodes to observe the effect on the circuit, implying that voltage offsets could clarify the situation.
  • A participant explains that with a grounded gate, the gate voltage can still be positive relative to a negative supply voltage (Vss), which may help in understanding the circuit behavior.
  • Another participant states that the NMOS is operating in the triode region and describes the conditions for conduction, emphasizing the importance of the gate-source voltage exceeding the threshold voltage.
  • One participant clarifies that the negative Vss allows the NMOS to turn on, as the gate-source voltage exceeds the threshold voltage in this configuration.

Areas of Agreement / Disagreement

Participants express differing views on the circuit configuration and the type of MOSFET involved, leading to some confusion. While there are explanations provided regarding the operation of the NMOS transistor, no consensus is reached on the initial confusion regarding the gate connection.

Contextual Notes

There are unresolved assumptions regarding the circuit configuration and the definitions of voltages used. The discussion includes varying interpretations of the MOSFET symbol and its implications for operation.

PalmTreeSD
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I am confused about this example circuit (attached) where the Gate it connected to Ground.
I thought in order for current to flow in a MOSFET (i.e. NMOS) a positive gate voltage (Vg) AND Vds (drain to source voltage) needs to be applied. If Vg = 0, how is a channel created in order to allow current to flow in this circuit if this is not a depletion-type MOSFET?
I only have a guess as to how it is possible for current to be able to flow.

Thanks in advance

scan0007.jpg
 
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Looks like a typo, the FET in your attached figure is a PMOS.
 
Err, I was about to link you to this wiki page

http://en.wikipedia.org/wiki/MOSFET#Circuit_symbols

when I realized the symbol in your assignment very much resembles what they call a N-channel MOSFET enh (no bulk) on that wiki page. I thought arrow pointing out always meant PMOS, but apparently not ... ?

(At least my advice is cheap.)
 
Why don't you add 5 volts to all three nodes--it will change nothing but voltage offsets, and see how it looks.
 
Um, the grounded gate is 5 volts positive as compared to Vss (-5v)
If you think of it as:
Vdd = 10v
Vgate = 5v
Vss = 0v
does that explain it better?

Paul, the 60 year old student
 
It is Ok. The transistor is NMOS and it is operating in triode region. For transistor to conduct in strong inversion, the condition is gate to source voltage has to be greater than threshold voltage. I said that it is in linear region because Vd < Vg - Vt. Now using the MOS equation is triode region, the problem can be solved.
 
It is because Vss is negative.. To turn on the nMOS, gate-source or gate-drain voltage must be more than the threshold. In this case, you have more than threshold voltage between the gate and Vss, therefore, nMOS turns on.
 
Last edited:

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