How do I design a traffic light controller using a counter and clock?

  • Thread starter Thread starter brad sue
  • Start date Start date
  • Tags Tags
    Controller Light
AI Thread Summary
The discussion focuses on designing a traffic light controller for an intersection using a counter and clock, with specific timing for red, yellow, and green lights. The user is attempting to create a modulo 10 counter to manage the light states but is struggling with the output tables and relationships. Suggestions include using flip-flops and basic gates instead of memory, and the importance of defining states and creating a truth/transition table. Resources like state machine concepts and Karnaugh maps are recommended for further assistance. The user expresses gratitude for the guidance received, indicating progress in their design efforts.
brad sue
Messages
270
Reaction score
0
Hi,
I have some problem to design a traffic controller.
the traffic lights are placed at an intersection of two streets, one street running north-south (called NS) and another street running east-west (called EW).
there is 5 clock cycles for Red light, 1 clock cycle for Yellow light , and 4 clock cycles for Green light. EW light is Red when NS light is Yellow or Green. Similarly, NS light is Red when EW light is Yellow or Green.
I need to design the controller that is essentially a counter driven with a clock (without any other external input). I will need 10 states to design the circuit. The six outputs are R-EW, Y-EW, G-EW, R-NS, Y-NS, and G-NS

What I did is that I tried to design a modulo 10 counter (see attached file ). I form the truth table of the system.
A B C D | NS | EW |
0 0 0 0 | R | G |
0 0 0 1 | R | G |
0 0 1 0 | R | G |
0 0 1 1 | R | G |
0 1 0 0 | R | Y |
0 1 0 1 | G | R |
0 1 1 0 | G | R |
0 1 1 1 | G | R |
1 0 0 0 | G | R |
1 0 0 1 | Y | R |

Then I tried the output tables, but I does resemble to anything I don't have the relationship of the table.
please can you help me ?
thank you
B.
 

Attachments

Engineering news on Phys.org
Normal solution would be to use a memory (ROM)
Treat each possible setup as a location in memory, set the value of the memory so that the output lines are the correct state for each switch.
Then clock through the memory in sequence outputing these values.

You can always think of a memory as mapping a particlular set of inputs (the address lines) onto a particular set of outputs (the data lines)
 
Hi mgb_phys,

we cannot use memory, only any kind of flip-flop and basic gates.
B
 
brad sue said:
Hi mgb_phys,

we cannot use memory, only any kind of flip-flop and basic gates.
B

You are designing a state machine. Have you learned how to do that yet? There is a step-by-step process to define the states, figure out how many FFs the state machine will require, and then write the truth/transition table and implement the logic.

http://en.wikipedia.org/wiki/State_machine


.
 
Also worth googling "Karnaugh map"
 
Thank you berkeman and mgb_phys,

I have looked at what you suggested me and I got some good things to work with!

B.
 
mgb_phys said:
Also worth googling "Karnaugh map"

Karnaugh Maps by member Kenneth Mann
https://www.physicsforums.com/showthread.php?t=100628

or search "Science Education" forum for threads containing Karnaugh
https://www.physicsforums.com/forumdisplay.php?f=35
 
Last edited by a moderator:
Back
Top