Leakage current or not?

[EvLer]

Let's say I have two NAND gates hooked up to a pull-up R and an inverter.
If one NAND has HH input and the other LL, would there be a leakage current into LL input state gate?

 

[Manchot]

It would be helpful to show us a circuit diagram. The way you have it worded, it doesn't really make all that much sense.

 

[EvLer]

nvmd, i think i got it.
There is a leakage current, the datasheet says so :grumpy: